Datasheet
Table Of Contents
- Figure 1. Block diagram
- 1 Description
- 2 Maximum ratings
- 3 Pin connection
- 4 Electrical characteristics
- 5 Typical electrical performance
- Figure 3. IC consumption vs. VCC
- Figure 4. IC consumption vs. TJ
- Figure 5. VCC Zener voltage vs. TJ
- Figure 6. Startup and UVLO vs. TJ
- Figure 7. Feedback reference vs. TJ
- Figure 8. E/A output clamp levels vs. TJ
- Figure 9. UVLO saturation vs. TJ
- Figure 10. OVP levels vs. TJ
- Figure 11. Inductor saturation threshold vs. TJ
- Figure 12. Vcs clamp vs. TJ
- Figure 13. ZCD sink/source capability vs. TJ
- Figure 14. ZCD clamp level vs. TJ
- Figure 15. R discharge vs. TJ
- Figure 16. Line drop detection threshold vs. TJ
- Figure 17. VMULTpk - VVFF dropout vs. TJ
- Figure 18. PFC_OK threshold vs. TJ
- Figure 19. PFC_OK FFD threshold vs. TJ
- Figure 20. Multiplier characteristics at VFF = 1 V
- Figure 21. Multiplier characteristics at VFF = 3 V
- Figure 22. Multiplier gain vs. TJ
- Figure 23. Gate drive clamp vs. TJ
- Figure 24. Gate drive output saturation vs. TJ
- Figure 25. Delay to output vs. TJ
- Figure 26. Start-up timer period vs. TJ
- 6 Application information
- 7 Application examples and ideas
- Figure 34. Demonstration board EVL6564-100W, wide-range mains: electrical schematic
- Figure 35. L6564 100W TM PFC: compliance to EN61000-3-2 standard
- Figure 36. L6564 100W TM PFC: compliance to JEITA-MITI standard
- Figure 37. L6564 100 W TM PFC: input current waveform at 230 - 50 Hz - 100 W load
- Figure 38. L6564 100W TM PFC: input current waveform at 100 V - 50 Hz - 100 W load
- 8 Package mechanical data
- 9 Order codes
- 10 Revision history

Electrical characteristics L6564
10/33 DocID16202 Rev 5
I
COMP
Source current V
COMP
= 4 V, V
INV
= 2.4 V 2 4 mA
Sink current V
COMP
= 4 V, V
INV
= 2.6 V 2.5 4.5 mA
V
COMP
Upper clamp voltage I
SOURCE
= 0.5 mA 5.7 6.2 6.7
VBurst-mode voltage
(3)
2.3 2.4 2.5
Lower clamp voltage I
SINK
= 0.5 mA
(3)
2.12.252.4
Boost inductor saturation detector
V
CS_th
Threshold on current sense
(3)
1.6 1.7 1.8 V
I
INV
E/A input pull-up current After V
CS
> V
CS_th
, before restarting 5 10 13 µA
Start-up timer
t
START_DEL
Start-up delay First cycle after wakeup 25 50 75 µs
t
START
Timer period
75 150 300
µs
Restart after V
CS
> V
CS_th
150 300 600
Current sense comparator
I
CS
Input bias current V
CS
= 0 1 µA
t
LEB
Leading edge blanking 100 150 250 ns
td
(H-L)
Delay to output 100 200 300 ns
V
CSclamp
Current sense reference
clamp
V
COMP
= upper clamp,
V
MULT
=1 V, V
VFF
= 1 V
1.0 1.08 1.16 V
Vcs
ofst
Current sense offset
V
MULT
= 0, V
VFF
= 3 V 40 70
mV
V
MULT
= 3 V, V
VFF
= 3 V 20
PFC_OK functions
I
PFC_OK
Input bias current V
PFC_OK
= 0 to 2.6 V -0.1 -1 µA
V
PFC_OK_C
Clamp voltage I
PFC_OK
= 1 mA 9 9.5 V
V
PFC_OK_S
OVP threshold
(1)
voltage rising 2.435 2.5 2.565 V
V
PFC_OK_R
Restart threshold after OVP
(1)
voltage falling 2.34 2.4 2.46 V
V
PFC_OK_D
Disable threshold
(1)
voltage falling 0.12 0.35 V
V
PFC_OK_D
Disable threshold
(1)
voltage falling T
J
= 25 °C 0.17 0.23 0.29 V
V
PFC_OK_E
Enable threshold
(1)
voltage rising 0.15 0.38 V
V
PFC_OK_E
Enable threshold
(1)
voltage rising T
J
= 25 °C 0.21 0.27 0.32 V
V
FFD
Feedback failure detection
threshold (V
INV
falling)
V
PFC_OK
= V
PFC_OK_S
1.61 1.66 1.71 V
Table 4. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit