L6564 10-pin transition mode PFC controller Datasheet - production data Inductor saturation protection AC brownout detection Low ( ≤ 100 µA) start-up current 6 mA max.
Contents L6564 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Pin connection . . . . . . . . . . .
L6564 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures L6564 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. 4/33 Block diagram . . . . . . . . . . . . . . . .
L6564 1 Description Description The L6564 device is a current mode PFC controller operating in transition mode (TM) and represents the compact version of the L6563S device as it embeds the same driver, reference and control stages in a very compact 10-pin SSOP10 package. The highly linear multiplier, along with a special correction circuit that reduces crossover distortion of the mains current, allows wide range mains operation with an extremely low THD even over a large load range.
Maximum ratings L6564 2 Maximum ratings 2.1 Absolute maximum ratings Table 1. Absolute maximum ratings 2.2 Symbol Pin VCC 10 --- Parameter Value Unit IC supply voltage (ICC 20 mA) Self-limited V 1, 3, 6 Max. pin voltage (Ipin 1 mA) Self-limited V --- 2, 4, 5 Analog inputs and outputs -0.3 to 8 V IZCD 7 Zero current detector max.
L6564 Pin connection 3 Pin connection Figure 2. Pin connection ,19 9FF &203 *' 08/7 *1' &6 =&' 9)) 3)&B2. $0 Y Table 3. Pin description N° Name Function 1 INV Inverting input of the error amplifier. The information on the output voltage of the PFC preregulator is fed into the pin through a resistor divider. The pin normally features high impedance. 2 COMP Output of the error amplifier.
Pin connection L6564 Table 3. Pin description (continued) N° 6 Name Function PFC preregulator output voltage monitoring/disable function. This pin senses the output voltage of the PFC preregulator through a resistor divider and is used for protection purposes. If the voltage on the pin exceeds 2.5 V the IC stops switching and restarts as the voltage on the pin falls below 2.4 V. However, if at the same time the voltage of the INV pin falls below 1.66 V, PFC_OK a feedback failure is assumed.
L6564 4 Electrical characteristics Electrical characteristics TJ = -25 to 125 °C, VCC = 12 V, CO = 1 nF between the pin GD and GND, CFF = 1 µF and RFF = 1 M between the pin VFF and GND; unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit 10.3 22.5 V Supply voltage VCC VCCOn VCCOff VCCrestart Operating range After turn-on Turn-on threshold (1) 11 12 13 V Turn-off threshold (1) 8.7 9.5 10.
Electrical characteristics L6564 Table 4. Electrical characteristics (continued) Symbol ICOMP VCOMP Parameter Test condition Min. Typ. Max. Unit Source current VCOMP = 4 V, VINV = 2.4 V 2 4 mA Sink current VCOMP = 4 V, VINV = 2.6 V 2.5 4.5 mA Upper clamp voltage ISOURCE = 0.5 mA 5.7 6.2 6.7 Burst-mode voltage (3) 2.3 2.4 2.5 2.1 2.25 2.4 1.6 1.7 1.8 V 5 10 13 µA 25 50 75 µs 75 150 300 150 300 600 Lower clamp voltage ISINK = 0.
L6564 Electrical characteristics Table 4. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit 1 3 Voltage feed-forward VVFF Linear operation range V Dropout VMULTpk-VVFF VCC < VCCOn 800 VCC > or = to VCCOn 20 V mV ∆VVFF Line drop detection thresh. Below peak value 40 70 100 mV ∆VVFF Line drop detection thresh. Below peak value TJ = 25 °C 50 70 90 mV RDISCH Internal discharge resistor TJ = 25 °C 7.5 10 12.
Typical electrical performance 5 L6564 Typical electrical performance Figure 3. IC consumption vs. VCC Figure 4. IC consumption vs. TJ 100 10 Operating 10 Quiescent Disabled or during OV P 1 I c current (m A) 1 Co=1nF f =70kHz Tj = 25°C I cc [m A] VCC=12V Co = 1nF f =70kHz 0.1 Latched off 0.1 Before Start up 0.01 VccOFF VccON 0.01 0. 001 0 5 10 15 20 25 -50 30 -25 0 25 50 75 100 125 150 175 Tj (C) Vcc [V ] Figure 5. VCC Zener voltage vs. TJ Figure 6. Startup and UVLO vs.
L6564 Typical electrical performance Figure 7. Feedback reference vs. TJ Figure 8. E/A output clamp levels vs. TJ 2. 6 7 Uper Clam p 6 VCC = 12V 2.55 5 V COM P (V ) pi n INV (V ) V CC = 12V 2. 5 4 3 Lower Clamp 2 2.45 1 0 2. 4 -50 -25 0 25 50 75 Tj (C) 100 125 150 -50 175 -25 0 25 50 75 100 Figure 9. UVLO saturation vs. TJ 150 175 Figure 10. OVP levels vs. TJ 2. 5 1 0.9 2. 48 VCC = 0V 0.8 OV P T h 2. 46 P FC_OK l evels (V ) 0.7 0.6 V 125 Tj (C) 0.5 0.4 2. 44 2.
Typical electrical performance L6564 Figure 11. Inductor saturation threshold vs. TJ Figure 12. Vcs clamp vs. TJ 1.9 1. 4 1.8 1.7 1. 3 VCSx (V ) CS pi n (V ) 1.6 1.5 VCC = 12V VCOMP =Upper clamp 1. 2 1.4 1.3 1. 1 1.2 1.1 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 Figure 13. ZCD sink/source capability vs. TJ 100 125 150 175 Figure 14. ZCD clamp level vs.
L6564 Typical electrical performance Figure 15. R discharge vs. TJ Figure 16. Line drop detection threshold vs. TJ 20 90 18 80 16 70 14 60 50 mV kOhm 12 10 40 8 30 6 20 4 10 2 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 Figure 17. VMULTpk - VVFF dropout vs. TJ 100 125 150 175 Figure 18. PFC_OK threshold vs. TJ 0.4 1. 5 0.35 1 0.3 0. 5 0.25 Th (V ) 2 0 ON 0.2 -0. 5 0.15 -1 0.1 -1. 5 0.
Typical electrical performance L6564 Figure 20. Multiplier characteristics at VFF = 1 V Figure 21. Multiplier characteristics at VFF = 3 V 700 1. 2 VCOMP 1. 1 V COM P Upper voltage cl amp 600 1 Upper vo ltage 5 .5 5 .0V 0. 9 4.5 V 500 4. 0V 400 0. 8 V CS (V ) V CS (m V) 5. 5V 0. 7 0. 6 0. 5 5. 0V 4. 5V 300 3.5 V 4. 0V 0. 4 200 0. 3 3. 5V 0. 2 3.0 100 3. 0V 0. 1 2. 6V 2.6 V 0 0 0. 1 0.2 0. 3 0. 4 0.5 0.6 0.7 0. 8 0.9 1 0 1.1 0 0. 5 1 1.
L6564 Typical electrical performance Figure 24. Gate drive output saturation vs. TJ Figure 25. Delay to output vs. TJ 12 300 High level 10 250 TD(H-L) (n s) 6 200 VCC = 12V 150 4 100 Low level 2 50 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tj (C) Tj (C) Figure 26. Start-up timer period vs.
Application information L6564 6 Application information 6.1 Overvoltage protection Normally, the voltage control loop keeps the output voltage VO of the PFC preregulator close to its nominal value, set by the ratio of the resistors R1 and R2 of the output divider. A pin of the device (PFC_OK) has been dedicated to monitor the output voltage with a separate resistor divider (R3 high, R4 low, see Figure 27). This divider is selected so that the voltage at the pin reaches 2.
L6564 6.2 Application information Feedback failure protection (FFP) The OVP function described above handles “normal” overvoltage conditions, i.e. those resulting from an abrupt load/line change or occurring at startup. In case the overvoltage is generated by a feedback disconnection, for instance when the upper resistor of the output divider (R1) fails open, the comparator detects the voltage at the INV pin. If the voltage is lower than 1.
Application information L6564 Figure 28.
L6564 Application information The twice-mains-frequency (2 fL) ripple appearing across CFF is triangular with a peak-topeak amplitude that, with good approximation, is given by: Equation 1 VFF 2 VMULTpk 1 4fLRFF CFF where fL is the line frequency.
Application information 6.4 L6564 THD optimizer circuit The L6564 device is provided with a special circuit that reduces the conduction dead-angle occurring to the AC input current near the zero-crossings of the line voltage (crossover distortion). In this way the THD (total harmonic distortion) of the current is considerably reduced. A major cause of this distortion is the inability of the system to transfer energy effectively when the instantaneous line voltage is very low.
L6564 Application information Figure 31. THD optimization: standard TM PFC controller (left side) and L6564 (right side) Input current Input current Rectified mains voltage Rectified mains voltage Imains Input current Imains Input current Vdrain MOSFET's drain voltage Vdrain MOSFET's drain voltage Essentially, the circuit artificially increases the ON-time of the power switch with a positive offset added to the output of the multiplier in the proximity of the line voltage zero-crossings.
Application information L6564 However, in some applications such as ac-dc adapters, where the PFC preregulator is turned off at light load for energy saving reasons, even a well-designed boost inductor may occasionally slightly saturate when the PFC stage is restarted because of a larger load demand. This happens when the restart occurs at an unfavorable line voltage phase, i.e. when the output voltage is significantly below the rectified peak voltage.
L6564 6.6 Application information Power management/housekeeping functions A communication line with the control IC of the cascaded dc-dc converter can be established via the disable function included in the PFC_OK pin (see Section 6.2: Feedback failure protection (FFP) on page 19 for more details). Typically this line is used to allow the PWM controller of the cascaded dc-dc converter to shut down the L6564 device in case of light load and to minimize the no-load input consumption.
Application information L6564 Table 5. Summary of L6564 idle states Typical IC Condition Caused or revealed bey IC behavior Restart condition UVLO VCC < VCCOff Disabled VCC > VCCOn 90 µA Feedback disconnected PFC_OK > VPFC_OK_S AND INV < 1.66 V Latched VCC < VCCrestart then VCC > VCCOn 180 µA Standby PFC_OK < VPFC_OK_D Stop switching PFC_OK > VPFC_OK_E 1.5 mA AC brownout VFF < VDIS Stop switching RUN > VEN 1.5 mA OVP PFC_OK > VPFC_OK_S Stop switching PFC_OK < VPFC_OK_R 2.
L6564 Application examples and ideas 7 Application examples and ideas Figure 34. Demonstration board EVL6564-100W, wide-range mains: electrical schematic ) )8 6( $ & 1 9DF ' 1 5 17& 5 6 & 1 - 0.'6 ' 677+ / & 1 9 B a / 65: 34 ;;;9 ' *%8 - a / +) < 5 7 - 0.'6 & X) 9 & 1 5 5 ' // 5 0 5 0 ' %=; & 5 0 5 .
Application examples and ideas L6564 Figure 35. L6564 100W TM PFC: compliance to Figure 36. L6564 100W TM PFC: compliance to EN61000-3-2 standard JEITA-MITI standard Meas ured value EN61000-3- 2 class- D lim its Measur ed value 0.1 0.01 0.001 1 0.1 0.01 0.001 0.0001 0.0001 1 3 5 7 1 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Harmonic Order [n] Harmonic Order [n] Figure 37.
L6564 8 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 39. SSOP10 package outline 8140761 rev.
Package mechanical data L6564 Table 6. SSOP10 package mechanical data Dimensions (mm) Symbol Min. Typ. A 1.75 A1 0.10 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 4.80 4.90 5 E 5.80 6 6.20 E1 3.80 3.90 4 e 30/33 Max. 0.25 1 h 0.25 0.50 L 0.40 0.
L6564 9 Order codes Order codes Table 7.
Revision history 10 L6564 Revision history Table 8. Document revision history Date Revision 08-Sep-2009 1 Initial release. 23-Dec-2010 2 Updated: Figure 1, Figure 19, Figure 27, Figure 29, Table 3, Table 4, Table 5, Chapter 6.2, Chapter 6.3. 28-Sep-2011 3 Updated: Table 4, Chapter 6.
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