Datasheet
Table Of Contents
- Figure 1. Packages
- Table 1. Order Codes
- 1 Features
- 1.1 APPLICATIONS
- 2 Description
- Figure 2. Block Diagram
- Table 2. Absolute Maximum Ratings
- Figure 3. Pin Connection (Top view)
- Table 3. Thermal Data
- Table 4. Pin Description
- Table 5. Electrical Characteristics (Tj = -25 to 125 C, VCC = 12, CO = 1 nF; unless otherwise specified)
- 3 Typical Electrical Characteristics
- Figure 4. Supply current vs. Supply voltage
- Figure 5. Start-up & UVLO vs. Tj
- Figure 6. IC consumption vs. Tj
- Figure 7. Vcc Zener voltage vs. Tj
- Figure 8. Feedback reference vs. Tj
- Figure 9. OVP current vs. Tj
- Figure 10. E/A output clamp levels vs. Tj
- Figure 11. Delay-to-output vs. Tj
- Figure 12. Multiplier characteristic
- Figure 13. Multiplier gain vs. Tj
- Figure 14. Vcs clamp vs. Tj
- Figure 15. Start-up timer vs. Tj
- Figure 16. ZCD clamp levels vs. Tj
- Figure 17. ZCD source capability vs. Tj
- Figure 18. Gate-drive output low saturation
- Figure 19. Gate-drive output high saturation
- Figure 20. Gate-drive clamp vs. Tj
- Figure 21. UVLO saturation vs. Tj
- 4 Application Information
- 4.1 Overvoltage protection
- 4.2 THD optimizer circuit
- Figure 22. THD optimization: standard TM PFC controller (left side) and L6562 (right side)
- Figure 23. Typical application circuit (250W, Wide-range mains)
- Figure 24. Demo board (EVAL6562-80W, Wide-range mains): Electrical schematic
- Figure 25. EVAL6562-80W: PCB and component layout (Top view, real size: 57 x 108 mm)
- Table 6. EVAL6562N: Evaluation results at full load
- Table 7. EVAL6562N: Evaluation results at half load
- Table 8. EVAL6562N: No-load measurements
- Figure 26. Line filter (not tested for EMI compliance) used for EVAL6562N evaluation
- 5 Package Information
- Figure 27. DIP-8 Mechanical Data & Package Dimensions
- Figure 28. SO-8 Mechanical Data & Package Dimensions
- 6 Revision History
- Table 9. Revision History
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L6562
Figure 14. Vcs clamp vs. T
j
Figure 15. Start-up timer vs. T
j
Figure 16. ZCD clamp levels vs. T
j
Figure 17. ZCD source capability vs. T
j
Figure 18. Gate-drive output low saturation
Figure 19. Gate-drive output high saturation
Tj (°C)
V
CSx
(V)
-50 0 50 100 150
1
1.2
1.4
1.6
1.8
2
Vcc = 12 V
V
COMP
= Upper clamp
Tj (°C)
Tstart
(µs)
-50 0 50 100 150
100
110
120
130
140
150
Vcc = 12 V
Tj (°C)
V
ZCD
(V)
-50 0 50 100 150
0
1
2
3
4
5
6
7
Vcc = 12 V
I
ZCD
= ±2.5 mA
Upper clamp
Lower clamp
Tj (°C)
I
ZCDsrc
(mA)
-50 0 50 100 150
-8
-6
-4
-2
0
Vcc = 12 V
V
ZCD
= lower clamp
V
pin7
[V]
0 200 400 600 800 1,000
0
1
2
3
4
I
GD
[mA]
Tj = 25 °C
Vcc = 11 V
SINK
0 100 200 300 400 500 600 700
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
V
pin7
[V]
I
GD
[mA]
Tj = 25 °C
Vcc = 11 V
SOURCE
Vcc - 2.0
Vcc - 2.5
Vcc - 3.0
Vcc - 3.5
Vcc - 4.0