Datasheet
Table Of Contents
- Figure 1. Packages
- Table 1. Order Codes
- 1 Features
- 1.1 APPLICATIONS
- 2 Description
- Figure 2. Block Diagram
- Table 2. Absolute Maximum Ratings
- Figure 3. Pin Connection (Top view)
- Table 3. Thermal Data
- Table 4. Pin Description
- Table 5. Electrical Characteristics (Tj = -25 to 125C, VCC = 12, CO = 1 nF; unless otherwise specified)
- 3 Typical Electrical Characteristics
- Figure 4. Supply current vs. Supply voltage
- Figure 5. Start-up & UVLO vs. Tj
- Figure 6. IC consumption vs. Tj
- Figure 7. Vcc Zener voltage vs. Tj
- Figure 8. Feedback reference vs. Tj
- Figure 9. OVP current vs. Tj
- Figure 10. E/A output clamp levels vs. Tj
- Figure 11. Delay-to-output vs. Tj
- Figure 12. Multiplier characteristic
- Figure 13. Multiplier gain vs. Tj
- Figure 14. Vcs clamp vs. Tj
- Figure 15. Start-up timer vs. Tj
- Figure 16. ZCD clamp levels vs. Tj
- Figure 17. ZCD source capability vs. Tj
- Figure 18. Gate-drive output low saturation
- Figure 19. Gate-drive output high saturation
- Figure 20. Gate-drive clamp vs. Tj
- Figure 21. UVLO saturation vs. Tj
- 4 Application Information
- 4.1 Overvoltage protection
- 4.2 THD optimizer circuit
- Figure 22. THD optimization: standard TM PFC controller (left side) and L6562 (right side)
- Figure 23. Typical application circuit (250W, Wide-range mains)
- Figure 24. Demo board (EVAL6562-80W, Wide-range mains): Electrical schematic
- Figure 25. EVAL6562-80W: PCB and component layout (Top view, real size: 57 x 108 mm)
- Table 6. EVAL6562N: Evaluation results at full load
- Table 7. EVAL6562N: Evaluation results at half load
- Table 8. EVAL6562N: No-load measurements
- Figure 26. Line filter (not tested for EMI compliance) used for EVAL6562N evaluation
- 5 Package Information
- Figure 27. DIP-8 Mechanical Data & Package Dimensions
- Figure 28. SO-8 Mechanical Data & Package Dimensions
- 6 Revision History
- Table 9. Revision History

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L6562
Figure 25. EVAL6562-80W: PCB and component layout (Top view, real size: 57 x 108 mm)
Table 6. EVAL6562N: Evaluation results at full load
Table 7. EVAL6562N: Evaluation results at half load
Vin (V
AC
)
Pin (W)
Vo (V
DC
) ∆Vo(V
pk-pk
)
Po (W) η (%) PF THD (%)
85 86.4 394.79 12.8 80.16 92.8 0.998 3.6
110 84.6 394.86 12.8 80.20 94.8 0.996 4.2
135 83.8 394.86 12.8 80.20 95.7 0.991 4.9
175 83.2 394.87 15.5 80.20 96.4 0.981 6.5
220 82.9 394.87 15.7 80.20 96.7 0.956 7.8
265 82.7 394.87 15.9 80.20 97.0 0.915 9.2
Note: measurements done with the line filter shown in figure 23
Vin (V
AC
)
Pin (W)
Vo (V
DC
) ∆Vo(V
pk-pk
)
Po (W) η (%) PF THD (%)
85 42.8 394.86 6.6 40.20 93.9 0.994 5.5
110 42.5 394.90 6.6 40.20 94.6 0.985 6.2
135 42.5 394.91 6.7 40.20 94.6 0.967 7.1
175 42.5 394.93 8.0 40.19 94.6 0.939 8.3
220 42.6 394.94 8.2 40.19 94.3 0.869 9.8
265 42.6 394.94 8.3 40.19 94.3 0.776 11.4
Note: measurements done with the line filter shown in figure 23