Datasheet

Programming manual L6470
54/70 Doc ID16737 Rev 5
Any attempt to write the CONFIG register when the motor is running causes the command
to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.22).
9.1.22 STATUS
When the HiZ flag is high, it indicates that the bridges are in high impedance state. Any
motion command makes the device exit from High Z state (HardStop and SoftStop
included), unless error flags forcing a High Z state are active.
The UVLO flag is active low and is set by an undervoltage lockout or reset events (power-up
included).
The TH_WRN, TH_SD, OCD flags are active low and indicate, respectively, thermal
warning, thermal shutdown and overcurrent detection events.
STEP_LOSS_A and STEP_LOSS_B flags are forced low when a stall is detected on bridge
A or bridge B respectively.
The NOTPERF_CMD and WRONG_CMD flags are active high and indicate, respectively,
that the command received by SPI cannot be performed or does not exist at all.
The SW_F flag reports the SW input status (low for open and high for closed).
The SW_EVN flag is active high and indicates a switch turn-on event (SW input falling
edge).
The UVLO, TH_WRN, TH_SD, OCD, STEP_LOSS_A, STEP_LOSS_B, NOTPERF_CMD,
WRONG_CMD and SW_EVN flags are latched: when the respective conditions make them
active (low or high), they remain in that state until a GetStatus command is sent to the IC.
The BUSY bit reflects the BUSY
pin status. The BUSY flag is low when a constant speed,
positioning or motion command is under execution and is released (high) after the command
has been completed.
The SCK_MOD bit is an active high flag indicating that the device is working in Step-clock
mode. In this case the step-clock signal should be provided through the STCK input pin. The
DIR bit indicates the current motor direction:
MOT_STATUS indicates the current motor status:
Table 34. STATUS register
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
SCK_MOD STEP_LOSS_B STEP_LOSS_A OCD TH_SD TH_WRN UVLO WRONG_CMD
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
NOTPERF_CMD MOT_STATUS DIR SW_EVN SW_F BUSY HiZ
Table 35. STATUS register DIR bit
DIR Motor direction
1Forward
0Reverse