Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Block diagram
- 2 Electrical data
- 3 Electrical characteristics
- 4 Pin connection
- 5 Typical applications
- 6 Functional description
- 6.1 Device power-up
- 6.2 Logic I/O
- 6.3 Charge pump
- 6.4 Microstepping
- 6.5 Absolute position counter
- 6.6 Programmable speed profiles
- 6.7 Motor control commands
- 6.8 Internal oscillator and oscillator driver
- 6.9 Overcurrent detection
- 6.10 Undervoltage lockout (UVLO)
- 6.11 Thermal warning and thermal shutdown
- 6.12 Reset and standby
- 6.13 External switch (SW pin)
- 6.14 Programmable DMOS slew rate, deadtime and blanking time
- 6.15 Integrated analog-to-digital converter
- 6.16 Internal voltage regulator
- 6.17 BUSY\SYNC pin
- 6.18 FLAG pin
- 7 Phase current control
- 8 Serial interface
- 9 Programming manual
- 9.1 Registers and flags description
- Table 9. Register map
- 9.1.1 ABS_POS
- 9.1.2 EL_POS
- 9.1.3 MARK
- 9.1.4 SPEED
- 9.1.5 ACC
- 9.1.6 DEC
- 9.1.7 MAX_SPEED
- 9.1.8 MIN_SPEED
- 9.1.9 FS_SPD
- 9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC
- 9.1.11 INT_SPEED
- 9.1.12 ST_SLP
- 9.1.13 FN_SLP_ACC
- 9.1.14 FN_SLP_DEC
- 9.1.15 K_THERM
- 9.1.16 ADC_OUT
- 9.1.17 OCD_TH
- 9.1.18 STALL_TH
- 9.1.19 STEP_MODE
- 9.1.20 ALARM_EN
- 9.1.21 CONFIG
- Table 22. CONFIG register
- Table 23. Oscillator management
- Table 24. External switch hard stop interrupt mode
- Table 25. Overcurrent event
- Table 26. Programmable power bridge output slew rate values
- Table 27. Motor supply voltage compensation enable
- Table 28. PWM frequency: integer division factor
- Table 29. PWM frequency: multiplication factor
- Table 30. Available PWM frequencies [kHz]: 8-MHz oscillator frequency
- Table 31. Available PWM frequencies [kHz]: 16-MHz oscillator frequency
- Table 32. Available PWM frequencies [kHz]: 24-MHz oscillator frequency
- Table 33. Available PWM frequencies [kHz]: 32-MHz oscillator frequency
- 9.1.22 STATUS
- 9.2 Application commands
- Table 37. Application commands
- 9.2.1 Command management
- 9.2.2 Nop
- 9.2.3 SetParam (PARAM, VALUE)
- 9.2.4 GetParam (PARAM)
- 9.2.5 Run (DIR, SPD)
- 9.2.6 StepClock (DIR)
- 9.2.7 Move (DIR, N_STEP)
- 9.2.8 GoTo (ABS_POS)
- 9.2.9 GoTo_DIR (DIR, ABS_POS)
- 9.2.10 GoUntil (ACT, DIR, SPD)
- 9.2.11 ReleaseSW (ACT, DIR)
- 9.2.12 GoHome
- 9.2.13 GoMark
- 9.2.14 ResetPos
- 9.2.15 ResetDevice
- 9.2.16 SoftStop
- 9.2.17 HardStop
- 9.2.18 SoftHiZ
- 9.2.19 HardHiZ
- 9.2.20 GetStatus
- 9.1 Registers and flags description
- 10 Package mechanical data
- 11 Revision history

Functional description L6470
30/70 Doc ID16737 Rev 5
6.12 Reset and standby
The device can be reset and put into Standby mode through a dedicated pin. When the
STBY
\RST pin is driven low, the bridges are left open (High Z state), the internal charge
pump is stopped, the SPI interface and control logic are disabled and the internal 3 V
voltage regulator maximum output current is reduced to I
REG,STBY
; as a result, the L6470
heavily reduces the power consumption. At the same time the register values are reset to
default and all protection functions are disabled. STBY
\RST input must be forced low at
least for t
STBY,min
in order to ensure the complete switch to Standby mode.
On exiting Standby mode, as well as for IC power-up, a delay of up to t
logicwu
must be given
before applying a new command to allow proper oscillator and logic startup and a delay of
up to t
cpwu
must be given to allow the charge pump startup.
On exiting Standby mode, the bridges are disabled (HiZ flag high) and any motion command
makes the device exit High Z state (HardStop and SoftStop included).
Attention: It is not recommended to reset the device when outputs are
active. The device should be switched to high impedance
state before being reset.
6.13 External switch (SW pin)
The SW input is internally pulled up to V
DD
and detects if the pin is open or connected to
ground (see Figure 13).
The SW_F bit of the STATUS register indicates if the switch is open (‘0’) or closed (‘1’) (see
Section 9.1.22); the bit value is refreshed at every system clock cycle (125 ns). The
SW_EVN flag of the STATUS register is raised when a switch turn-on event (SW input falling
edge) is detected (see Section 9.1.22). A GetStatus command releases the SW_EVN flag
(see Section 9.2.20).
By default, a switch turn-on event causes a HardStop interrupt (SW_MODE bit of CONFIG
register set to ‘0’). Otherwise (SW_MODE bit of CONFIG register set to ‘1’), switch input
events do not cause interrupts and the switch status information is at the user’s disposal
(see Ta bl e 3 4, Section 9.1.22).
The switch input may be used by the GoUntil and ReleaseSW commands as described in
Section 9.2.10 and 9.2.11.
If the SW input is not used, it should be connected to VDD.