Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - gate drivers Non-inverting High AND low side, Autonomous SO 14

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L6386E Electrical characteristics

Doc ID 13989 Rev 2 7/18

3.3 Timing diagram

Figure 3. Input/output timing diagram

HIN

LIN

SD

HOUT

LOUT

V

REF

V

CIN

DIAG

Note: SD active condition is latched until next ne

g

ative IN ed

g

e.

D97IN522A