Datasheet

Pin connection L6386E
4/18 Doc ID 13989 Rev 2
2 Pin connection
Figure 2. Pin connection (Top view)
Table 4. Pin description
N° Pin Type Function
1 LIN I Low side driver logic input
2 SD
(1)
1. The circuit guarantees 0.3 V maximum on the pin (@ Isink = 10 mA), with VCC > 3 V. This allows to omit
the “bleeder” resistor connected between the gate and the source of the external MOSFET normally used
to hold the pin low; the gate driver assures low impedance also in SD condition.
I Shut down logic input
3 HIN I High side driver logic input
4 V
CC
Low voltage supply
5 DIAG O Open drain diagnostic output
6 CIN I Comparator input
7 SGND Ground
8 PGND Power ground
9 LVG
(1)
O Low side driver output
10, 11 N.C. Not connected
12 OUT O High side driver floating driver
13 HVG
(1)
O High side driver output
14 V
boot
Bootstrapped supply voltage
LIN
SD
HIN
V
CC
DIAG
SGND
CIN
1
3
2
4
5
6
7 PGND
N.C.
LVG
N.C.
OUT
HVG
V
boot
14
13
12
11
10
8
9
D97IN521A