Datasheet

L6229
16/25
3.7 NON-DISSIPATIVE OVERCURRENT DETECTION and PROTECTION
The L6229 integrates an Overcurrent Detection Circuit (OCD) for full protection. This circuit provides Output-to-
Output and Output-to-Ground short circuit protection as well. With this internal over current detection, the exter-
nal current sense resistor normally used and its associated power dissipation are eliminated. Figure 20 shows
a simplified schematic for the overcurrent detection circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each High Side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent I
REF
. When the output current reaches the detection threshold (typically I
SOVER
= 2.8A) the OCD compar-
ator signals a fault condition. When a fault condition is detected, an internal open drain MOS with a pull down
capability of 4mA connected to pin DIAG is turned on.
The pin DIAG can be used to signal the fault condition to a
µ C or to shut down the Three-Phase Bridge simply
by connecting it to pin EN and adding an external R-C (see R
EN
, C
EN
).
Figure 20. Overcurrent Protection Simplified Schematic
Figure 21 shows the Overcurrent Detetection operation. The Disable Time t
DISABLE
before recovering normal
operation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected
whether by C
EN
and R
EN
values and its magnitude is reported in Figure 22. The Delay Time t
DELAY
before turn-
ing off the bridge when an overcurrent has been detected depends only by C
EN
value. Its magnitude is reported
in Figure 23
C
EN
is also used for providing immunity to pin EN against fast transient noises. Therefore the value of C
EN
should be chosen as big as possible according to the maximum tolerable Delay Time and the R
EN
value should
be chosen according to the desired Disable Time.
The resistor R
EN
should be chosen in the range from 2.2K Ω to 180K Ω . Recommended values for R
EN
and C
EN
are respectively 100K Ω and 5.6nF that allow obtaining 200 µ s Disable Time.
+
OVER TEMPERATURE
I
REF
I
REF
I
1
+I
2
/ n
I
1
/ n
HIGH SIDE DMOS
POWER SENSE
1 cell
POWER SENSE
1 cell
POWER SENSE
1 cell
POWER DMOS
n cells
POWER DMOS
n cells
POWER DMOS
n cells
HIGH SIDE DMOS HIGH SIDE DMOS
OUT
1
OUT
2
VS
A
OUT
3
VS
B
I
1
I
2
I
3
I
2
/ n
I
3
/ n
OCD
COMPARATOR
TO GATE
LOGIC
INTERNAL
OPEN-DRAIN
R
DS(ON)
40Ω TYP.
C
EN
R
EN
DIAG
EN
V
DD
µC or LOGIC
D02IN1381