Datasheet

L6227
8/22
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP
The L6227 integrates two independent Power MOS
Full Bridges. Each Power MOS has an Rdson =
0.73ohm (typical value @ 25°C), with intrinsic fast
freewheeling diode. Cross conduction protection is
achieved using a dead time (td = 1
µ s typical) be-
tween the switch off and switch on of two Power MOS
in one leg of a bridge.
Using N Channel Power MOS for the upper transis-
tors in the bridge requires a gate drive voltage above
the power supply voltage. The Bootstrapped
(VBOOT) supply is obtained through an internal Os-
cillator and few external components to realize a
charge pump circuit as shown in Figure 3. The oscil-
lator output (VCP) is a square wave at 600kHz (typi-
cal) with 10V amplitude. Recommended values/part
numbers for the charge pump circuit are shown in
Table1.
Table 1. Charge Pump External Components
Values
Figure 3. Charge Pump Circuit
LOGIC INPUTS
Pins IN1
A
, IN2
B
, IN1
B
and IN2
B
are TTL/CMOS and
uC compatible logic inputs. The internal structure is
shown in Fig. 4. Typical value for turn-on and turn-off
thresholds are respectively Vthon = 1.8V and Vthoff
= 1.3V.
Pins EN
A
and EN
B
have identical input structure with
the exception that the drains of the Overcurrent and
thermal protection MOSFETs (one for the Bridge A
and one for the Bridge B) are also connected to these
pins. Due to these connections some care needs to
be taken in driving these pins. The EN
A
and EN
B
in-
puts may be driven in one of two configurations as
shown in figures 5 or 6. If driven by an open drain
(collector) structure, a pull-up resistor R
EN
and a ca-
pacitor C
EN
are connected as shown in Fig. 5. If the
driver is a standard Push-Pull structure the resistor
R
EN
and the capacitor C
EN
are connected as shown
in Fig. 6. The resistor R
EN
should be chosen in the
range from 2.2k
Ω to 180K Ω . Recommended values
for R
EN
and C
EN
are respectively 100K Ω and 5.6nF.
More information on selecting the values is found in
the Overcurrent Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 5. EN
A
and EN
B
Pins Open Collector
Driving
Figure 6. EN
A
and EN
B
Pins Push-Pull Driving
C
BOOT
220nF
C
P
10nF
R
P
100Ω
D1 1N4148
D2 1N4148
D2
C
BOOT
D1
R
P
C
P
V
S
VS
A
VCP VBOOT VS
B
D01IN1328
5V
D01IN1329
ESD
PROTECTION
5V
5V
OPEN
COLLECTOR
OUTPUT
R
EN
C
EN
EN
A
or EN
B
D02IN134
9
5V
PUSH-PULL
OUTPUT
R
EN
C
EN
EN
A
or EN
B
D02IN135
0