L6227 DMOS DUAL FULL BRIDGE DRIVER WITH PWM CURRENT CONTROLLER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 2.8A OUTPUT PEAK CURRENT (1.4A DC) RDS(ON) 0.73Ω TYP.
L6227 ABSOLUTE MAXIMUM RATINGS Symbol VS VOD VBOOT Parameter Test conditions Value Unit Supply Voltage VSA = VSB = VS 60 V Differential Voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB VSA = VSB = VS = 60V; VSENSEA = VSENSEB = GND 60 V Bootstrap Peak Voltage VSA = VSB = VS VS + 10 V VIN,VEN Input and Enable Voltage Range -0.3 to +7 V VREFA, VREFB Voltage Range at pins VREFA and VREFB -0.3 to +7 V -0.
L6227 THERMAL DATA Symbol Description Rth-j-pins Maximum Thermal Resistance Junction-Pins Rth-j-case Maximum Thermal Resistance Junction-Case PowerDIP24 SO24 PowerSO36 Unit 19 15 - °C/W - - 2 °C/W 44 52 - °C/W Rth-j-amb1 Maximum Thermal Resistance Junction-Ambient Rth-j-amb1 Maximum Thermal Resistance Junction-Ambient 2 - - 36 °C/W Rth-j-amb1 Maximum Thermal Resistance Junction-Ambient 3 - - 16 °C/W Rth-j-amb2 Maximum Thermal Resistance Junction-Ambient 4 59 78 63 °C
L6227 PIN DESCRIPTION PACKAGE SO24/ PowerDIP24 PowerSO36 PIN # PIN # 1 Name Type 10 IN1A Logic input Bridge A Logic Input 1. 2 11 IN2A Logic input Bridge A Logic Input 2.
L6227 PIN DESCRIPTION (continued) 23 8 ENA 24 9 VREFA (6) Logic Input (6) Bridge A Enable. LOW logic level switches OFF all Power MOSFETs of Bridge A. This pin is also connected to the collector of the Overcurrent and Thermal Protection transistor to implement over current protection. If not used, it has to be connected to +5V through a resistor. Analog Input Bridge A Current Controller Reference Voltage. Do not leave this pin open or connect to GND.
L6227 ELECTRICAL CHARACTERISTICS (continued) (Tamb = 25 °C, Vs = 48V, unless otherwise specified) Symbol Parameter Test Conditions Min Input to out turn ON delay time ILOAD =1.4A, Resistive Load (dead time included) Output rise time(8) ILOAD =1.4A, Resistive Load 40 tD(off)EN Enable to out turn OFF delay time (8) ILOAD =1.4A, Resistive Load 500 tD(off)IN Input to out turn OFF delay time ILOAD =1.4A, Resistive Load 500 Output Fall Time (8) ILOAD =1.
L6227 Figure 1. Switching Characteristic Definition EN Vth(ON) Vth(OFF) t IOUT 90% 10% t D01IN1316 tFALL tD(OFF)EN tRISE tD(ON)EN Figure 2.
L6227 CIRCUIT DESCRIPTION POWER STAGES and CHARGE PUMP The L6227 integrates two independent Power MOS Full Bridges. Each Power MOS has an Rdson = 0.73ohm (typical value @ 25°C), with intrinsic fast freewheeling diode. Cross conduction protection is achieved using a dead time (td = 1µs typical) between the switch off and switch on of two Power MOS in one leg of a bridge. Using N Channel Power MOS for the upper transistors in the bridge requires a gate drive voltage above the power supply voltage.
L6227 TRUTH TABLE INPUTS OUTPUTS Description (*) EN IN1 IN2 OUT1 OUT2 L X X High Z High Z H L L GND GND H H L Vs GND (Vs) Forward H L H GND (Vs) Vs Reverse H H H Vs Vs Brake Mode (Upper Path) Disable Brake Mode (Lower Path) X = Don't care High Z = High Impedance Output GND (Vs) = GND during Ton, Vs during Toff (*) Valid only in case of load connected between OUT1 and OUT2 PWM CURRENT CONTROL The L6227 includes a constant off time PWM current controller for each of the tw
L6227 Figure 8. Output Current Regulation Waveforms IOUT VREF RSENSE tON tOFF tOFF 1µs tBLANK VSENSE 1µs tBLANK VREF Slow Decay 0 Slow Decay tRCRISE VRC tRCRISE 5V 2.5V tRCFALL tRCFALL 1µs tDT 1µs tDT ON OFF SYNCHRONOUS RECTIFICATION D02IN1351 B C D A B C D Figure 9 shows the magnitude of the Off Time tOFF versus COFF and ROFF values. It can be approximately calculated from the equations: tRCFALL = 0.6 · ROFF · COFF tOFF = tRCFALL + tDT = 0.
L6227 be bigger than tRCRISE for allowing a good current regulation by the PWM stage. Furthermore, the on time tON can not be smaller than the minimum on time tON(MIN). t O N > t O N ( MIN ) = 2.5µ s (typ. value) t O N > t RCRISE – t DT tRCRISE = 600 · COFF Figure 10 shows the lower limit for the on time tON for having a good PWM current regulation capacity. It has to be said that tON is always bigger than tON(MIN) because the device imposes this condition, but it can be smaller than tRCRISE - tDT.
L6227 Figure 10. Area where tON can vary maintaining the PWM regulation. ton(min) [µs] 100 10 1.5µs (typ. value) 1 0.1 1 10 100 Coff [nF] SLOW DECAY MODE Figure 11 shows the operation of the bridge in the Slow Decay mode. At the start of the off time, the lower power MOS is switched off and the current recirculates around the upper half of the bridge. Since the voltage across the coil is low, the current decays slowly.
L6227 NON-DISSIPATIVE OVERCURRENT PROTECTION The L6227 integrates an Overcurrent Detection Circuit (OCD). This circuit provides protection against a short circuit to ground or between two phases of the bridge. With this internal over current detection, the external current sense resistor normally used and its associated power dissipation are eliminated. Figure 12 shows a simplified schematic of the overcurrent detection circuit.
L6227 Figure 13.
L6227 Figure 14. tDISABLE versus C EN and REN (VDD = 5V). R EN = 2 20 kΩ 3 1 . 10 R EN = 100 kΩ R EN = 4 7 kΩ R EN = 3 3 kΩ tDISABLE [µs] R EN = 1 0 kΩ 1 00 10 1 1 10 10 0 C E N [n F ] Figure 15. tDELAY versus CEN (VDD = 5V). tdelay [µs] 10 1 0.1 1 10 Cen [nF] 100 THERMAL PROTECTION In addition to the Ovecurrent Protection, the L6227 integrates a Thermal Protection for preventing the device destruction in case of junction over temperature.
L6227 APPLICATION INFORMATION A typical application using L6227 is shown in Fig. 16. Typical component values for the application are shown in Table 3. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power pins (VSA and VSB) and ground near the L6227 to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching.
L6227 OUTPUT CURRENT CAPABILITY AND IC POWER DISSIPATION In Fig. 17 and Fig. 18 are shown the approximate relation between the output current and the IC power dissipation using PWM current control driving two loads, for two different driving types: – One Full Bridge ON at a time (Fig.17) in which only one load at a time is energized. – Two Full Bridges ON at the same time (Fig.18) in which two loads at the same time are energized.
L6227 Figure 19. Mounting the PowerSO package. Slug soldered to PCB with dissipating area Slug soldered to PCB with dissipating area plus ground layer Slug soldered to PCB with dissipating area plus ground layer contacted through via holes Figure 20. PowerSO36 Junction-Ambient thermal resistance versus on-board copper area.
L6227 DIM. A a1 a2 a3 b c D (1) D1 E e e3 E1 (1) E2 E3 E4 G H h L N S MIN. mm TYP. 0.10 0 0.22 0.23 15.80 9.40 13.90 MAX. 3.60 0.30 3.30 0.10 0.38 0.32 16.00 9.80 14.50 inch TYP. MIN. 0.004 0 0.008 0.009 0.622 0.370 0.547 0.65 11.05 10.90 0.0256 0.435 11.10 0.429 2.90 6.20 0.228 3.20 0.114 0.10 0 15.90 0.610 1.10 1.10 0.031 10°(max.) 8 °(max.) 5.80 2.90 0 15.50 0.80 OUTLINE AND MECHANICAL DATA MAX. 0.141 0.012 0.130 0.004 0.015 0.012 0.630 0.385 0.570 0.437 0.114 0.244 0.126 0.004 0.626 0.
L6227 mm DIM. MIN. TYP. A A1 inch MAX. MIN. TYP. 4.320 0.380 A2 0.170 0.015 3.300 0.130 B 0.410 0.460 0.510 0.016 0.018 0.020 B1 1.400 1.520 1.650 0.055 0.060 0.065 c 0.200 0.250 0.300 0.008 0.010 0.012 D 31.62 31.75 31.88 1.245 1.250 1.255 E 7.620 8.260 0.300 e 2.54 E1 6.350 e1 L 6.600 M 0.325 0.100 6.860 0.250 0.260 0.270 0.300 7.620 3.180 OUTLINE AND MECHANICAL DATA MAX. 3.430 0.125 0.135 Powerdip 24 0˚ min, 15˚ max.
L6227 mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D (1) 15.20 15.60 0.598 0.614 E 7.40 7.60 0.291 0.299 e 1.27 10.0 10.65 0.394 0.419 h 0.25 0;75 0.010 0.030 L 0.40 1.27 0.016 0.050 ddd Weight: 0.60gr 0.050 H k OUTLINE AND MECHANICAL DATA 0˚ (min.), 8˚ (max.) 0.10 0.004 (1) “D” dimension does not include mold flash, protusions or gate burrs.
L6227 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice.
