L6226Q DMOS dual full bridge driver Features ■ Operating supply voltage from 8 to 52 V ■ 2.8 A output peak current (1.4 A DC) ■ RDS(on) 0.73 Ω typ.
Contents L6226Q Contents 1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Pin connection . . . . . . . . . . . . . . . . .
L6226Q Electrical data 1 Electrical data 1.1 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Parameter VS VOD OCDA,OCDB PROGCLA, PROGCLB VBOOT VIN,VEN Parameter VSA = VSB = VS 60 V Differential voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB VSA = VSB = VS = 60 V, VSENSEA = VSENSEB = GND 60 V OCD pins voltage range -0.3 to + 10 V PROGCL pins voltage range -0.3 to + 7 V VS + 10 V -0.
Electrical data 1.3 L6226Q Thermal data Table 3. Symbol Rth(JA) Thermal data Parameter Thermal resistance junction-ambient max. (1) 2 Value Unit 42 °C/W 1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm on the top side plus 6 cm2 ground layer connected through 18 via holes (9 below the IC).
L6226Q Pin connection 2 Pin connection Figure 2. Note: Pin connection (top view) 1 The pins 2 to 8 are connected to die PAD. 2 The die PAD must be connected to GND pin.
Pin connection Table 4. L6226Q Pin description N° Pin Type Function 1, 21 GND GND 9 OUT1B 11 OCDB Open drain output Bridge B overcurrent detection and thermal protection pin. An internal open drain transistor pulls to GND when overcurrent on bridge B is detected or in case of thermal protection. 12 SENSEB Power supply Bridge B source pin. This pin must be connected to power ground directly or through a sensing power resistor.
L6226Q 3 Electrical characteristics Electrical characteristics TA = 25 °C, Vs = 48 V, unless otherwise specified Table 5. Electrical characteristics Symbol Parameter Test condition Min Typ Max Unit VSth(ON) Turn-on threshold 5.8 6.3 6.8 V VSth(OFF) Turn-off threshold 5 5.
Electrical characteristics Table 5. L6226Q Electrical characteristics (continued) Symbol Parameter tdt Dead time protection fCP Charge pump frequency Test condition Min Typ 0.5 1 Max Unit µs -25 °C < TJ < 125 °C 0.6 1 MHz 0.29 2.21 2.
L6226Q Electrical characteristics Figure 4.
Circuit description L6226Q 4 Circuit description 4.1 Power stages and charge pump The L6226Q integrates two independent power MOS full bridges. Each power MOS has an RDS(on) = 0.73 Ω (typical value @ 25 °C), with intrinsic fast freewheeling diode. Cross conduction protection is achieved using a dead time (td = 1 μs typical) between the switch off and switch on of two power MOS in one leg of a bridge.
L6226Q 4.2 Circuit description Logic inputs Pins IN1A, IN2A, IN1B, IN2B, ENA and ENB are TTL/CMOS and microcontroller compatible logic inputs. The internal structure is shown in Figure 6. Typical value for turn-on and turn-off thresholds are respectively Vthon = 1.8 V and Vthoff = 1.3 V. Pins ENA and ENB are commonly used to implement overcurrent and thermal protection by connecting them respectively to the outputs OCDA and OCDB, which are open-drain outputs.
Circuit description 4.3 L6226Q Truth table Table 7. Truth table Inputs Outputs EN IN1 IN2 OUT1 OUT2 L X (1) X High Z (2) High Z H L L GND GND H H L Vs GND H L H GND Vs H H H Vs Vs 1. X = Don't care 2. High Z = High impedance output 4.4 Non-dissipative overcurrent detection and protection An overcurrent detection circuit (OCD) is integrated.
L6226Q Circuit description values and its magnitude is reported in Figure 12. The delay time tDELAY before turning off the bridge when an overcurrent has been detected depends only by CEN value. Its magnitude is reported in Figure 13. CEN is also used for providing immunity to pin EN against fast transient noises. Therefore the value of CEN should be chosen as big as possible according to the maximum tolerable Delay Time and the REN value should be chosen according to the desired Disable Time.
Circuit description L6226Q Figure 10. Overcurrent protection waveforms IOUT ISOVER VEN VDD Vth(ON) Vth(OFF) VEN(LOW) ON OCD OFF ON tDELAY BRIDGE tDISABLE OFF tOCD(ON) tEN(FALL) tOCD(OFF) tEN(RISE) tD(ON)EN tD(OFF)EN D02IN1400 Figure 11. Output current protection threshold versus RCL value 2 .5 2 .2 5 2 1 .7 5 1 .5 1 .2 5 I SOVER [A ] 1 0 .7 5 0 .5 0 .
L6226Q Circuit description Figure 12. tDISABLE versus CEN and REN (VDD = 5 V) 1 .10 R EN = 220 k Ω 3 R EN = 100 k Ω R EN = 47 k Ω R EN = 33 k Ω R EN = 10 k Ω tDISABLE [µs] 100 10 1 1 10 100 C E N [nF] Figure 13. tDELAY versus CEN (VDD = 5 V) tdelay [μs] 10 1 0.
Circuit description 4.5 L6226Q Thermal protection In addition to the overcurrent detection, the L6226Q integrates a thermal protection for preventing the device destruction in case of junction over temperature. It works sensing the die temperature by means of a sensible element integrated in the die. The device switch-off when the junction temperature reaches 165 °C (typ. value) with 15 °C hysteresis (typ. value).
L6226Q 5 Application information Application information A typical application using L6226Q is shown in Figure 14. Typical component values for the application are shown in Table 8. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power pins (VSA and VSB) and ground near the L6226Q to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching.
Application information L6226Q Figure 14. Typical application Note: 18/29 To reduce the IC thermal resistance, therefore improve the dissipation path, the NC pins can be connected to GND.
L6226Q 6 Paralleled operation Paralleled operation The outputs of the L6226Q can be paralleled to increase the output current capability or reduce the power dissipation in the device at a given current level. It must be noted, however, that the internal wire bond connections from the die to the power or sense pins of the package must carry current in both of the associated half bridges.
Paralleled operation L6226Q Figure 15. Parallel connection for higher current To operate the device in parallel and maintain a lower over current threshold, half bridge 1 and the half bridge 2 of the bridge A can be connected in parallel and the same done for the bridge B as shown in Figure 16.
L6226Q Paralleled operation Figure 16. Parallel connection with lower overcurrent threshold It is also possible to parallel the four half bridges to obtain a simple half bridge as shown in Figure 17. In this configuration the, the over current threshold is equal to twice the minimum threshold set by the resistors RCLA or RCLB in Figure 17. It is recommended to use RCLA = RCLB. The resulting half bridge has the following characteristics. ● Equivalent device: half bridge ● RDS(on) 0.18 Ω typ.
Paralleled operation L6226Q Figure 17.
L6226Q 7 Output current capability and IC power dissipation Output current capability and IC power dissipation In Figure 18 and Figure 19 are shown the approximate relation between the output current and the IC power dissipation using PWM current control driving two loads, for two different driving types: ● One full bridge ON at a time (Figure 18) in which only one load at a time is energized. ● Two full bridges ON at the same time (Figure 19) in which two loads at the same time are energized.
Thermal management 8 L6226Q Thermal management In most applications the power dissipation in the IC is the main factor that sets the maximum current that can be deliver by the device in a safe operating condition. Therefore, it has to be taken into account very carefully. Besides the available space on the PCB, the right package should be chosen considering the power dissipation. Heat sinking can be achieved using copper on the PCB with proper area and thickness.
L6226Q Package mechanical data 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 9. VFQFPN32 5x5x1.0 pitch 0.50 Databook (mm) Dim. Min Typ Max A 0.80 0.85 0.95 b 0.18 0.25 0.30 b1 0.165 0.175 0.185 D 4.85 5.00 5.15 D2 3.
Package mechanical data L6226Q Figure 20.
L6226Q 10 Order codes Order codes Table 10. Order code Order code Package L6226Q Packaging Tube VFQFPN32 5x5x1.
Revision history 11 L6226Q Revision history Table 11.
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