Datasheet

L6226 Application information
Doc ID 9452 Rev 4 17/31
5 Application information
A typical application using L6226 is shown in Figure 14. Typical component values for the
application are shown in Figure 8. A high quality ceramic capacitor in the range of 100 to
200 nF should be placed between the power pins (VS
A
and VS
B
) and ground near the
L6226 to improve the high frequency filtering on the power supply and reduce high
frequency transients generated by the switching. The capacitors connected from the
EN
A
/OCD
A
and EN
B
/OCD
B
nodes to ground set the shut down time for the Bridge A and
Bridge B respectively when an over current is detected (see overcurrent protection). The two
current sources (SENSE
A
and SENSE
B
) should be connected to power ground with a trace
length as short as possible in the layout. To increase noise immunity, unused logic pins are
best connected to 5 V (high logic level) or GND (low logic level) (see pin description).
It is recommended to keep power ground and signal ground separated on PCB.
Figure 14. Typical application
Table 8. Component values for typical application
C
1
100uF D
1
1N4148
C
2
100nF D
2
1N4148
C
BOOT
220nF R
CLA
5kΩ
C
P
10nF R
CLB
5kΩ
C
ENA
5.6nF R
ENA
100kΩ
C
ENB
5.6nF R
ENB
100kΩ
C
REF
68nF
&
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