Datasheet

L6208
8/27
Figure 2. Clock to Output Delay Time
Figure 3. Minimum Timing Definition; Clock Input
Figure 4. Minimum Timing Definition; Logic Inputs
CLOCK
I
OUT
t
t
t
DCLK
V
th(ON)
D01IN1317
CLOCK
t
CLK(MIN)H
t
CLK(MIN)L
V
th(OFF)
V
th(ON)
D01IN1318
V
th(OFF)
CLOCK
RESET
t
S(MIN)
t
H(MIN)
t
R(MIN)
t
RCLK(MIN)
LOGIC INPUTS
D01IN1319
V
th(OFF)
V
th(ON)
V
th(ON)