Datasheet

Application information L5987
30/41 Doc ID 14972 Rev 3
of heat. The Rth
JA
measured on the demonstration board described in the following
paragraph is about 60 °C/W for the VFQFPN package and about 40 °C/W for the HSOP
package.
Figure 17. Switching losses
6.6 Layout considerations
The PC board layout of switching DC/DC regulator is very important to minimize the noise
injected in high impedance nodes and interferences generated by the high switching current
loops.
In a step-down converter the input loop (including the input capacitor, the power MOSFET
and the free wheeling diode) is the most critical one. This is due to the fact that the high
value pulsed current are flowing through it. In order to minimize the EMI, this loop has to be
as short as possible.
The feedback pin (FB) connection to external resistor divider is a high impedance node, so
the interferences can be minimized placing the routing of feedback node as far as possible
from the high current paths. To reduce the pick up noise the resistor divider has to be placed
very close to the device.
To filter the high frequency noise, a small capacitor (220 nF) can be added as close as
possible to the input voltage pin of the device.
Thanks to the exposed pad of the device, the ground plane helps to reduce the thermal
resistance junction to ambient; so a large ground plane enhances the thermal performance
of the converter allowing high power conversion.
In Figure 18 a layout example is shown.