Datasheet
Table Of Contents
- Figure 1. Application circuit
- 1 Pin settings
- 2 Maximum ratings
- 3 Electrical characteristics
- 4 Functional description
- 5 Application information
- 5.1 Input capacitor selection
- 5.2 Inductor selection
- 5.3 Output capacitor selection
- 5.4 Compensation network
- 5.5 Thermal considerations
- 5.6 Layout considerations
- 5.7 Application circuit
- Figure 18. Demonstration board application circuit
- Table 9. Component list
- Figure 19. PCB layout (component side)
- Figure 20. PCB layout (bottom side)
- Figure 21. PCB layout (front side)
- Figure 22. Junction temperature vs output current
- Figure 23. Junction temperature vs output current
- Figure 24. Junction temperature vs output current
- Figure 25. Efficiency vs output current
- Figure 26. Efficiency vs output current
- Figure 27. Efficiency vs output current
- Figure 28. Load regulation
- Figure 29. Line regulation
- Figure 30. Short circuit behavior
- Figure 31. Load transient: from 0.1 A to 0.7 A
- Figure 32. Soft-start
- 6 Application ideas
- 7 Package mechanical data
- 8 Order codes
- 9 Revision history

L5980 Application information
Doc ID 13003 Rev 6 25/42
Equation 25
For example with V
OUT
= 1.2 V, V
IN
= 12 V, I
O
= 0.7 A, L = 22 μH, C
OUT
= 220 μF,
ESR = 50 mΩ, the type II compensation network is:
In Figure 15 is shown the module and phase of the open loop gain. The bandwidth is about
35 kHz and the phase margin is 49°.
C
5
C
4
2π R
4
C
4
4BW⋅ 1–⋅⋅⋅
------------------------------------------------------------- -=
R
1
1.1kΩ= R
2
249Ω= R
4
12kΩ= C
4
47nF= C
5
68pF=,,,,