Datasheet
Table Of Contents
- Figure 1. Application circuit
- 1 Pin settings
- 2 Maximum ratings
- 3 Electrical characteristics
- 4 Functional description
- 5 Application information
- 5.1 Input capacitor selection
- 5.2 Inductor selection
- 5.3 Output capacitor selection
- 5.4 Compensation network
- 5.5 Thermal considerations
- 5.6 Layout considerations
- 5.7 Application circuit
- Figure 18. Demonstration board application circuit
- Table 9. Component list
- Figure 19. PCB layout (component side)
- Figure 20. PCB layout (bottom side)
- Figure 21. PCB layout (front side)
- Figure 22. Junction temperature vs output current
- Figure 23. Junction temperature vs output current
- Figure 24. Junction temperature vs output current
- Figure 25. Efficiency vs output current
- Figure 26. Efficiency vs output current
- Figure 27. Efficiency vs output current
- Figure 28. Load regulation
- Figure 29. Line regulation
- Figure 30. Short circuit behavior
- Figure 31. Load transient: from 0.1 A to 0.7 A
- Figure 32. Soft-start
- 6 Application ideas
- 7 Package mechanical data
- 8 Order codes
- 9 Revision history

L5980 Application information
Doc ID 13003 Rev 6 15/42
5 Application information
5.1 Input capacitor selection
The capacitor connected to the input has to be capable to support the maximum input
operating voltage and the maximum RMS input current required by the device. The input
capacitor is subject to a pulsed current, the RMS value of which is dissipated over its ESR,
affecting the overall system efficiency.
So the input capacitor must have a RMS current rating higher than the maximum RMS input
current and an ESR value compliant with the expected efficiency.
The maximum RMS input current flowing through the capacitor can be calculated as:
Equation 3
Where Io is the maximum DC output current, D is the duty cycle, η is the efficiency.
Considering η = 1, this function has a maximum at D = 0.5 and it is equal to Io/2.
In a specific application the range of possible duty cycles has to be considered in order to
find out the maximum RMS input current. The maximum and minimum duty cycles can be
calculated as:
Equation 4
and
Equation 5
Where V
F
is the forward voltage on the freewheeling diode and V
SW
is voltage drop across
the internal PDMOS. In Table 6. some multi layer ceramic capacitors suitable for this device
are reported
Table 6. Input MLCC capacitors
Manufacturers Series Cap value (μF) Rated voltage (V)
MURATA
GRM31 10 25
GRM55 10 25
TDK C3225 10 25
I
RMS
I
O
D
2D
2
⋅
η
-------------- -–
D
2
η
2
------ -+⋅=
D
MAX
V
OUT
V
F
+
V
INMIN
V
SW
–
------------------------------------ -=
D
MIN
V
OUT
V
F
+
V
INMAX
V
SW
–
--------------------------------------=