Datasheet

Functional description L5973AD
8/22 Doc ID 9552 Rev 9
4.1 Power supply and voltage reference
The internal regulator circuit (shown in Figure 4) consists of a start-up circuit, an internal
voltage pre-regulator, the Bandgap voltage reference and the Bias block that provides
current to all the blocks.
The Starter gives the start-up currents to the whole device when the input voltage goes high
and the device is enabled (inhibit pin connected to ground).
The pre-regulator block supplies the Bandgap cell with a pre-regulated voltage V
REG
that
has a very low supply voltage noise sensitivity.
4.2 Voltages monitor
An internal block senses continuously the V
CC
, V
ref
and V
bg
. If the voltages go higher than
their thresholds, the regulator starts to work. There is also an hysteresis on the V
CC
(UVLO).
Figure 4. Internal regulator circuit
4.3 Oscillator and synchronization
Figure 5 shows the block diagram of the oscillator circuit.
The clock generator provides the switching frequency of the device that is internally fixed at
500 kHz. The frequency shifter block acts reducing the switching frequency in case of strong
overcurrent or short circuit. The clock signal is then used in the internal logic circuitry and is
the input of the ramp generator and synchronization blocks.
The ramp generator circuit provides the sawtooth signal, used to realize the PWM control
and the internal voltage feed forward, while the Synchronization circuit generates the
synchronization signal. In fact the device has a synchronization pin that can works both as
Master and Slave.
As Master to synchronize external devices to the internal switching frequency.
As Slave to synchronize itself by external signal.
STARTER
IC BIAS
PREREGULATOR
BANDGAP
VREG
VREF
D00IN1126
V
CC