Datasheet

L5150CJ / L5150CS Application information
Doc ID 15542 Rev. 15 17/34
Reset pulse delay T
rd
is given by:
Equation 2
t
rd
= 32 x T
osc
The Output Voltage Reset threshold can be adjusted via an external voltage divider R
1
+ R
2
(R
1
connected between R
es_Adj
and V
0
, R
2
connected between R
es_Adj
and GND) according
to the following formula:
Equation 3
V
thre
= [(R
1
+ R
2
) / R
2
] * V
Res_adj
The Output Voltage Reset threshold can be decreased down to 3.5 V. If it is needed to
maintain it to its default value (8% below V
0_ref
typical), it is enough to connect the R
es_Adj
pin directly to GND.
Figure 24. Reset time diagram
:
L
9
R
9
FU
5
HV
W
UU
W
UU
7
26&
W
UG
 7
26&
9
RXWBWK
9
5KWK
9
5OWK
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