L5150CJ L5150CS 5 V low dropout voltage regulator Datasheet − production data Features Max DC supply voltage VS 40 V Max output voltage tolerance ΔVo +/-2% Max dropout voltage Vdp 500 mV Io 150 mA Iqn µA(1) Output current Quiescent current 55 *$3*36 PowerSSO-12 *$3*36 SO-8 1. Typical value Description ■ Operating DC supply voltage range 5.
Contents L5150CJ / L5150CS Contents 1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 4 5 6 2/34 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.
L5150CJ / L5150CS List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures L5150CJ / L5150CS List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. 4/34 Block diagram . . . . . . . . . .
L5150CJ / L5150CS 1 Block diagram and pins description Block diagram and pins description Figure 1. Block diagram 9R 9V 67$57 83 5HVHW $GMXVWDEOH 7KUHVKROG 3RZHU 92/7$*( 5HV $GM 'ULYHU 5()(5(1&( 7KHUPDO &XUUHQW 6KXWGRZQ OLPLWHU 5HV /RZ 9ROWDJH 5HVHW 9FU (:R (:L *1' *$3*&)7 Figure 2. Configuration diagram (top view) 7$% 6XEVWUDWH 62 *$3*&)7 3RZHU662 *$3*&)7 Doc ID 15542 Rev.
Block diagram and pins description Table 2. Pin name 6/34 L5150CJ / L5150CS Pins description PowerSSO-12 pin # SO-8 pin # Function Res_Adj 1 8 Reset adjustable threshold. Connected to an appropriate external voltage divider, it allows to properly set the reset threshold down to 3.5 V. Connect to GND if not needed. Res 2 1 Reset output. Internally connected to Vo through a 20 KΩ pull up resistor. This pin is pulled low when Vo < Vo_th. Keep open if not needed. Vcr 3 2 Reset delay.
L5150CJ / L5150CS Electrical specifications 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in the Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Electrical specifications 2.2 L5150CJ / L5150CS Thermal data Table 4. Thermal data Value Symbol Parameter Unit PowerSSO-12 Rthj-case Thermal resistance junction to case: Rthj-lead Thermal resistance junction to lead: Rthj-amb(1) SO-8 8 Thermal resistance junction to ambient: °K/W 52 40 °K/W 112 °K/W 1. PowerSSO-12: The values quoted are for PCB 77 mm x 86 mm x 1.6 mm, FR4, double copper layer with single heatsink layer, copper thickness 70 µm, thermal vias, copper area 2 cm2.
L5150CJ / L5150CS Table 5. Pin VS, Vo VS, Vo Electrical specifications General (continued) Symbol Parameter Current consumption Iqn_1 = IVs – Io Iqn_1 Iqn_150 Current consumption Iqn_150 = IVs – Io Test condition Min. Typ. Max. VS = 13.5 V, Io = 0.1 mA to 1 mA, Tj = 25 °C 55 VS = 13.5 V, Io = 0.1 mA to 1 mA, 95 VS = 13.5 V Io = 150 mA 3 150 Thermal protection temperature hysteresis Tw_hy 80 µA Thermal protection temperature Tw Unit 4.2 mA 190 °C 10 °C 1.
Electrical specifications Table 6. Reset (continued) Pin Symbol Parameter Res Trr Reset reaction time Res Trd Reset delay time Table 7. 10/34 L5150CJ / L5150CS Test condition VS = 13.5 V; Ctr = 1000 pF Min. Max. Unit 2 µs 4 11 ms Min. Typ. Max. Unit 2 Typ. Early warning Pin Symbol Parameter Test condition EWi VEWi_thl EW input low threshold voltage 2.35 2.50 2.65 V EWi VEWi_thh EW input high threshold voltage 2.42 2.57 2.
L5150CJ / L5150CS Electrical specifications 2.4 Electrical characteristics curves Figure 3. Output voltage vs. Tj Figure 4. Output voltage vs. VS 9RBUHI 9 9R UHI 9 ,R P$ 9V 9 ,R P$ 7F & 96 9 *$3*&)7 7M & *$3*&)7 Figure 5. Drop voltage vs. output current Figure 6. 9GS 9 Current consumption vs.
Electrical specifications Figure 9. L5150CJ / L5150CS Current consumption vs. input voltage (Io = 75 mA) Figure 10. Current limitation vs. Tj ,TQ P$ ,OLP P$ 9V 9 7M & 9V 9 *$3*&)7 *$3*&)7 Figure 11. Current limitation vs. input voltage Figure 12. Short-circuit current vs.
L5150CJ / L5150CS Electrical specifications Figure 15. VRlth vs. Tj Figure 16. VEWi_thh vs. Tj 9UOWK 9RBUHI 9HZLBWKK 9 9V 9 WR 9 9V 9 WR 9 7M & 7M & *$3*&)7 *$3*&)7 Figure 17. VEWi_thl vs. Tj Figure 18. Icr vs.
Application information L5150CJ / L5150CS 3 Application information 3.1 Voltage regulator The voltage regulator uses a p-channel mos transistor as a regulating element. With this structure a very low dropout voltage at current up to 150 mA is obtained. The output voltage is regulated up to input supply voltage of 40 V. The high-precision of the output voltage (2%) is obtained with a pre-trimmed reference voltage.
L5150CJ / L5150CS Application information Figure 22. Stability region (65 2KP 67$%,/,7< 5(*,21 (65PLQ 817(67(' 5(*,21 &R ) *$3*36 Note: The curve which describes the minimum ESR is derived from characterization data on the regulator with connected ceramic capacitors which feature low ESR values (at 100 kHz).
Application information 3.2 L5150CJ / L5150CS Reset The reset circuit monitors the output voltage Vo. If the output voltage becomes lower than Vo_th then Res goes low with a delay time (trr). When the output voltage becomes higher than Vo_th then Res goes high with a delay time trd. This delay is obtained by 32 periods of oscillator.
L5150CJ / L5150CS Application information Reset pulse delay Trd is given by: Equation 2 trd = 32 x Tosc The Output Voltage Reset threshold can be adjusted via an external voltage divider R1 + R2 (R1 connected between Res_Adj and V0, R2 connected between Res_Adj and GND) according to the following formula: Equation 3 Vthre = [(R1 + R2) / R2] * VRes_adj The Output Voltage Reset threshold can be decreased down to 3.5 V.
Application information 3.3 L5150CJ / L5150CS Early warning This circuit compares the EWi input signal with the internal voltage reference (typically 2.5 V). The use of an external voltage divider makes the comparator very flexible in the application. This function can be used to supervise the supply input voltage either before or after the protection diode and to give additional information to the microprocessor such as low voltage warnings. Figure 25.
L5150CJ / L5150CS Package and PCB thermal data 4 Package and PCB thermal data 4.1 PowerSSO-12 thermal data Figure 26. PowerSSO-12 PC board(1) *$3*&)7 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back side), thermal vias separation 1.2 mm, thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 25 µm, footprint dimension 4.1 mm x 6.5 mm ). Figure 27.
Package and PCB thermal data L5150CJ / L5150CS Figure 28. PowerSSO-12 thermal impedance junction ambient single pulse =7+ & : &X FP &X FP &X IRRW SULQW 7LPH V ("1($'5 Equation 4: pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tP/T Figure 29. Thermal fitting model of Vreg in PowerSSO-12 *$3*&)7 20/34 Doc ID 15542 Rev.
L5150CJ / L5150CS Table 8. Package and PCB thermal data PowerSSO-12 thermal parameter Area (cm2) Footprint R1 (°K/W) 1.53 R2 (°K/W) 3.21 R3 (°K/W) 5.2 R4 (°K/W) 2 8 7 7 8 R5 (°K/W) 22 15 10 R6 (°K/W) 26 20 15 C1 (W.s/°K) 0.00004 C2 (W.s/°K) 0.0016 C3 (W.s/°K) 0.08 C4 (W.s/°K) 0.2 0.1 0.1 C5 (W.s/°K) 0.27 0.8 1 C6 (W.s/°K) 3 6 9 Doc ID 15542 Rev.
Package and PCB thermal data 4.2 L5150CJ / L5150CS SO-8 thermal data Figure 30. SO-8 PC board(1) *$3*&)7 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 48 mm x 48 mm, PCB thickness = 2 mm, Cu thickness = 35 µm (front and back side), Cu thickness on vias 25 µm, Footprint dimension 4.1 mm x 6.5 mm ). Figure 31. Rthj-amb vs.
L5150CJ / L5150CS Package and PCB thermal data Figure 32. SO-8 thermal impedance junction ambient single pulse =7+ & : &X FP &X IRRW SULQW 7LPH V *$3*&)7 Equation 5: pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tP/T Figure 33. Thermal fitting model of Vreg in in SO-8 *$3*&)7 Doc ID 15542 Rev.
Package and PCB thermal data Table 9. 24/34 L5150CJ / L5150CS SO-8 thermal parameter Area (cm2) Footprint R1 (°K/W) 1.53 R2 (°K/W) 3.21 R3 (°K/W) 5.4 R4 (°K/W) 32 R5 (°K/W) 34 R6 (°K/W) 52 C1 (W.s/°K) 0.00004 C2 (W.s/°K) 0.0016 C3 (W.s/°K) 0.04 C4 (W.s/°K) 0.05 C5 (W.s/°K) 0.15 C6 (W.s/°K) 1 Doc ID 15542 Rev. 15 2 36 2.
L5150CJ / L5150CS Package and packing information 5 Package and packing information 5.1 ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 PowerSSO-12 mechanical data Figure 34. PowerSSO-12 package dimensions *$3*&)7 Doc ID 15542 Rev.
Package and packing information Table 10. L5150CJ / L5150CS PowerSSO-12 mechanical data Millimeters Symbol Min. Max. A 1.250 1.620 A1 0.000 0.100 A2 1.100 1.650 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.500 L 0.400 1.270 k 0° 8° X 1.900 2.500 Y 3.600 4.200 ddd 26/34 Typ. 0.100 Doc ID 15542 Rev.
L5150CJ / L5150CS 5.3 Package and packing information SO-8 package information Figure 35. SO-8 package dimensions Doc ID 15542 Rev.
Package and packing information Table 11. L5150CJ / L5150CS SO-8 mechanical data Millimeters Symbol Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0° ccc 8° 0.10 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2.
L5150CJ / L5150CS 5.4 Package and packing information PowerSSO-12 packing information Figure 36. PowerSSO-12 tube shipment (no suffix) % %DVH T W\ %XON T W\ 7XEH OHQJWK $ % & & $ $OO GLPHQVLRQV DUH LQ PP *$3*36 Figure 37.
Package and packing information 5.5 L5150CJ / L5150CS SO-8 packing information Figure 38. SO-8 tube shipment (no suffix) % %DVH T W\ %XON T W\ 7XEH OHQJWK $ % & & $ $OO GLPHQVLRQV DUH LQ PP *$3*36 Figure 39.
L5150CJ / L5150CS 6 Revision history Revision history Table 12. Document revision history Date Revision 09-Aug-2007 1 Initial release. 2 Updated Table 5.: General: – changed Vo_ref, Vline, Vload test conditions – added notes to Ilim and Vdp parameters – added Ioth_H, Ioth_L, Ioth parameters. Updated Table 6.: Reset: – added Vres_adj parameter – changed VRlth values (min./ typ./ max.) from 17/20/23 to 20/23/26 (% Vo_ref). Modified Section 3.2: Reset. 3 Updated Table 5.
Revision history L5150CJ / L5150CS Table 12.
L5150CJ / L5150CS Table 12. Revision history Document revision history (continued) Date Revision Changes 7 Changed document title Table 5: General – Ioth_H, Ioth_L: added test condition Updated Figure 4: Output voltage vs. VS Section 3.3: Early warning – changed internal voltage reference typical value from 1.23 V to 2.
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