Datasheet

Application information L4995
18/35 Doc ID 13103 Rev 14
3.1 Voltage regulator
Voltage regulator uses a p-channel transistor as a regulating element. With this structure,
very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated
up to transient input supply voltage of 40V. No functional interruption due to over-voltage
pulses is generated. A short circuit protection to GND is provided.
The voltage regulator is active when E
n
is high.
Figure 28. Behavior of output current versus regulated voltage V
o
3.2 Reset
The reset circuit supervises the output voltage V
o
. The V
o_th
reset threshold is defined with
the in-ternal reference voltage and a resistor output divider. If the output voltage becomes
lower than V
o_th
then R
es
goes low with a reaction time t
rr
. The reset low signal is
guaranteed for an output voltage V
o
greater than 1V.
When the output voltage becomes higher than V
o_th
then R
es
goes high with a delay t
rd
.
This delay is obtained by an internal oscillator.
The oscillator period is given by:
Equation 1
T
osc
= [(V
Rhth
-V
Rlth
) x C
tr
] / I
cr
+ [(V
Rhth
-V
Rlth
) x C
tr
] / I
dr
where:
I
cr
:is an internally generated charge current
I
dr
:is an internally generated discharge current
V
Rhth
, V
Rlth
:are two voltages defined with the output voltage and a resistor output
divider
C
tr
:is an external capacitance.
t
rd
is given by:
Equation 2
t
rd
= (V
Rhth
x C
tr
)/I
cr
+ 3 x T
osc
Vo
Vo_ref
IoutIshort Ilim