Datasheet

L4993 Application information
Doc ID 13517 Rev 8 17/32
Figure 25. Behavior of output current versus regulated voltage Vo
3.2 Reset
The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with
the in-ternal reference voltage and a resistor output divider. If the output voltage becomes
lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is
guaranteed for an output voltage Vo greater than 1V.
When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.
This delay is obtained by an internal oscillator.
The oscillator period is given by:
Tosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr
where:
Icr: is an internally generated charge current
Idr: is an internally generated discharge current
Vrhth, Vrlth: are two voltages defined with the output voltage and a resistor output
divider
Ctr: is an external capacitance.
trd is given by:
trd = 512 x Tosc
Reset is active when En is high.
6O
6O? REF
)OUT)SHORT )LIM
6O
6O? REF
)OUT)SHORT )LIM
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