Datasheet

HDMIULC6-4SC6 Technical information
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It’s the reason why some recommendations have to be followed (see Section 3.3: How to
ensure good ESD protection).
Figure 9. ESD behavior: parasitic phenomena due to unsuitable layout
3.3 How to ensure good ESD protection
While the HDMIULC6-4SC6 provides a high immunity to ESD surge, an efficient protection
depends on the layout of the board. In the same way, with the rail to rail topology, the track
from data lines to I/O pins, from V
CC
to V
BUS
pin, and from GND plane to GND pin must be
as short as possible to avoid over voltages due to parasitic phenomena (see Figure 9 and
Figure 10 for layout considerations).
V
BUS
Data line
V
CL
L
VBUS
L
I/O
L
GND
V
TRANSIL
ESD surge
on data line
V
F
dt
di
L
I/O
dt
di
L
I/O
dt
di
L
GND
dt
di
L
GND
V
cc
pin
I/O pin
GND pin
V
BUS
Data line
V
CL
L
VBUS
L
I/O
L
GND
V
TRANSIL
ESD surge
on data line
V
F
dt
di
L
I/O
dt
di
L
I/O
dt
di
L
GND
dt
di
L
GND
V
cc
pin
I/O pin
GND pin
0surge
dt
di
L
dt
di
LVV
0surge
dt
di
L
dt
di
LVVV
GNDI/OFCL
GNDI/OFTRANSILCL
<---=
>+++=
-
+
tr=1ns
t
V
CL-
NEGATIVE
SURGE
dt
di
L
dt
di
L
GNDI/O
--
dt
di
L
dt
di
L
GNDI/O
--
-V
F
tr=1ns
t
V
CL-
NEGATIVE
SURGE
dt
di
L
dt
di
L
GNDI/O
--
dt
di
L
dt
di
L
GNDI/O
--
-V
F
V
TRANSIL
+V
F
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GNDI/O
+
POSITIVE
SURGE
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GNDI/O
+
dt
di
L
dt
di
L
GNDI/O
+
POSITIVE
SURGE
V
TRANSIL
+V
F
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GNDI/O
+
dt
di
L
dt
di
L
GNDI/O
+
POSITIVE
SURGE
tr=1ns
t
V
CL+
dt
di
L
dt
di
L
GNDI/O
+
dt
di
L
dt
di
L
GNDI/O
+
POSITIVE
SURGE
Rd.IpVV
BRTRANSIL
+=
Figure 10. ESD behavior: layout
optimization
Figure 11. ESD behavior: measurement
conditions
Unsuitable layout
Optimized layout
TEST BOARD
Vbus
ESD SURGE
OUT
IN
HDMIULC6
-
4SC6HDMIULC6
-
4SC6