Datasheet

Functional description L6474
24/52 Doc ID 022529 Rev 3
6.10 Undervoltage lock-out (UVLO)
The L6474 provides a motor supply UVLO protection. When the motor supply voltage falls
below the VSthOff threshold voltage, the STATUS register UVLO flag is forced low. When a
GetStatus command is sent to the IC, and the undervoltage condition has expired, the
UVLO flag is released (see Section 9.1.13 and Section 9.2.7). Undervoltage condition
expires when the motor supply voltage goes over the VSthOn threshold voltage. When the
device is in undervoltage condition no motion can be performed. The UVLO flag is forced
low by logic reset (power-up included) even if no UVLO condition is present.
6.11 Thermal warning and thermal shutdown
An internal sensor allows the L6474 to detect when the device internal temperature exceeds
a thermal warning or an overtemperature threshold.
When the thermal warning threshold (T
j(WRN)
) is reached, the TH_WRN bit in the STATUS
register is forced low (see Section 9.1.13) until the temperature decreases below T
j(WRN)
and a GetStatus command is sent to the IC (see Section 9.1.13 and Section 9.2.7).
When the thermal shutdown threshold (T
j(OFF)
) is reached, the device goes into thermal
shutdown condition: the TH_SD bit in the STATUS register is forced low, the power bridges
are disabled, bridges in high impedance state and the HiZ bit in the STATUS register are
raised (see Section 9.1.13).
Thermal shutdown condition only expires when the temperature goes below the thermal
warning threshold (T
j(WRN)
).
On exiting thermal shutdown condition, the bridges are still disabled (HiZ flag high).
6.12 Reset and standby
The device can be reset and put into standby mode through a dedicated pin. When the
STBY
\RST pin is driven low, the bridges are left open (High Z state), the internal charge
pump is stopped, the SPI interface and control logic are disabled, and the internal 3 V
voltage regulator maximum output current is reduced to I
REG,STBY
; as a result the L6474
heavily reduces the power consumption. At the same time the register values are reset to
default and all protection functions are disabled. STBY\RST
input must be forced low at
least for tSTBY, min. in order to ensure the complete switch to standby mode.
On exiting standby mode, as well as for IC power-up, a delay of up to tlogicwu must be given
before applying a new command to allow proper oscillator and logic startup and a delay of
up to tcpwu must be given to allow the charge pump startup.
On exiting standby mode the bridges are disabled (HiZ flag high).
Attention: It is not recommended to reset the device when outputs are
active. The device should be switched to high impedance
state before being reset.