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This is information on a product in full production.

December 2012 Doc ID 022529 Rev 3 1/52

L6474

easySPIN – fully integrated microstepping motor driver

Datasheet − production data

Features

■ Operating voltage: 8 - 45 V

■ 7.0 A output peak current (3.0 A r.m.s.)

■ Low R

DS(on)

Power MOSFETs

■ Programmable power MOS slew-rate

■ Up to 1/16 microstepping

■ Current control with adaptive decay

■ Non-dissipative current sensing

■ SPI interface

■ Low quiescent and standby currents

■ Programmable non-dissipative overcurrent

protection on all power MOS

■ Two-level overtemperature protection

Applications

■ Bipolar stepper motor

Description

The L6474, realized in analog mixed signal

technology, integrates a dual low R

DS(on)

DMOS

full-bridge with all power switches equipped with

an accurate on-chip current sensing circuitry

suitable for non-dissipative current control and

overcurrent protections. Thanks to a new current

control, a 1/16 microstepping is achieved through

an adaptive decay mode which outperforms

traditional implementations.

All data registers, including those used to set

analogue values (i.e. current control value,

current protection trip point, dead time, etc.) are

sent through a standard 5 Mbit/s SPI.

A very rich set of protections (thermal, low bus

voltage, overcurrent) makes the L6474 “bullet

proof” as required by the most demanding motor

control applications.

HTSSOP28

POWERSO36

Table 1. Device summary

Order code Package Packing

L6474H HTSSOP28 Tube

L6474HTR HTSSOP28 Tape and reel

L6474PD POWERSO36 Tube

L6474PDTR POWERSO36 Tape and reel

www.st.com

Summary of content (52 pages)

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L6474 easySPIN – fully integrated microstepping motor driver Datasheet − production data Features ■ Operating voltage: 8 - 45 V ■ 7.0 A output peak current (3.0 A r.m.s.
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Contents L6474 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Thermal data . . . . . . . . . . . . . . . . . . .
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L6474 7 Contents 6.16 SYNC pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.17 FLAG pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Phase current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.1 Peak current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7.2 Auto-adjusted decay mode . . . . . . .
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Contents 11 4/52 L6474 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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L6474 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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List of figures L6474 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. 6/52 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 HTSSOP28 pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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L6474 Block diagram Figure 1. Block diagram 9'' 26&,1 0+] 2VFLOODWRU 26&287 $'&,1 95(* &3 9%227 &KDUJH SXPS ([W 2VF GULYHU &ORFN JHQ $'& 67%< 5(6 96$ 9 9ROWDJH 5HJ )/$* 9 ERRW 9 ERRW +6 $ 96$ +6 $ 5HJLVWHUV 287 $ 9'' +6 $ 287 $ /6 $ +6 $ /6 $ /6 $ /6 $ &RQWURO /RJLF 3*1' 96% +6 % /6 % &6 9 ERRW 9 ERRW 96% +6 % &. 63, 1 Block diagram 6'2 /6 % +6 % +6 % 287 % 6', 287 % 6<1& 67&.
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Electrical data L6474 2 Electrical data 2.1 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Test condition Logic interface supply voltage VDD VS Motor supply voltage VGND, diff VSA = VSB = VS Differential voltage between AGND, PGND and DGND Value Unit 5.5 V 48 V ±0.3 V Vboot Bootstrap peak voltage 55 V VREG Internal voltage regulator output pin and logic supply voltage 3.6 V VADCIN Integrated ADC input voltage range (ADCIN pin) -0.3 to +3.
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L6474 2.2 Electrical data Recommended operating conditions Table 3. Symbol Recommended operating conditions Parameter Test condition Value 3.3 V logic outputs VDD VS 2.3 3.3 V Logic interface supply voltage 5 V logic outputs 5 Motor supply voltage VSA = VSB = VS Vout_diff Differential voltage between VSA, OUT1A, OUT2A, PGND and VSB, OUT1B, OUT2B, PGND pins VSA = VSB = VS VREG,in Logic supply voltage VREG voltage imposed by external source VADC Unit 8 3.
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Electrical characteristics 3 L6474 Electrical characteristics VSA = VSB = 36 V; VDD = 3.3 V; internal 3 V regulator; TJ = 25 °C, unless otherwise specified. Table 5. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit General VSthOn VS UVLO turn-on threshold 7.5 8.2 8.9 V VSthOff VS UVLO turn-off threshold 6.6 7.2 7.8 V VSthHyst VS UVLO threshold hysteresis 0.7 1 1.3 V Iq Quiescent motor supply current 0.5 0.
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L6474 Table 5. Electrical characteristics Electrical characteristics (continued) Symbol tf SRout_r SRout_f Parameter Fall time Test condition (3) Output rising slew-rate Output falling slew-rate Min. Typ.
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Electrical characteristics Table 5. L6474 Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit Logic inputs and outputs VIL Low logic level input voltage VIH High logic level input voltage IIH IIL 0.8 2 High logic level input current (4) VIN = 5 V Low logic level input current (5) VIN = 0 V VOL Low logic level output voltage (6) VOH High logic level output voltage RPU RPD V V 1 -1 µA µA VDD = 3.3 V, IOL = 4 mA 0.3 VDD = 5 V, IOL = 4 mA 0.
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L6474 Table 5. Electrical characteristics Electrical characteristics (continued) Symbol Parameter tdisCS Deselect time tsetSDI Data input set-up time (7) tholSDI Test condition (7) Data input hold time (7) Min. Typ. Max. Unit 800 ns 25 ns 20 ns Data output enable time (7) 38 ns tdisSDO Data output disable time (7) 47 ns tvSDO Data output valid time (7) 57 ns tenSDO tholSDO Data output hold time (7) 37 ns Current control ISTEP,max Max.
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Electrical characteristics Table 5. L6474 Electrical characteristics (continued) Symbol Parameter VADC,ref Analog to digital converter reference voltage VREG V Analog to digital converter sampling frequency fOSC/ 512 kHz fS Test condition Min. Typ. Max. Unit 1. Accuracy depends on oscillator frequency accuracy. 2. Tested at 25 °C in a restricted range and guaranteed by characterization. 3. Rise and fall time depends on motor supply voltage value.
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L6474 4 Pin connection Pin connection Figure 2. HTSSOP28 pin connection (top view) RST DIR Figure 3.
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Pin connection L6474 4.1 Pin list Table 6. Pin description N. Name Type Function 17 VDD Power Logic outputs supply voltage (pull-up reference) 6 VREG Power Internal 3 V voltage regulator output and 3.3 V external logic supply 7 OSCIN Analog input Oscillator pin 1. To connect an external oscillator or clock source. If this pin is unused, it should be left floating. 8 OSCOUT Analog output Oscillator pin 2. To connect an external oscillator.
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L6474 Table 6. Pin connection Pin description (continued) N.
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Typical applications 5 L6474 Typical applications Table 7. Typical application values Name Value CVS 220 nF CVSPOL 100 µF CREG 100 nF CREGPOL 47 µF CDD 100 nF CDDPOL 10 µF D1 Charge pump diodes CBOOT 220 nF CFLY 10 nF RPU 39 kΩ RSW 100 Ω CSW 10 nF Figure 4. Bipolar stepper motor control application using L6474 #"//4 63 $ #$$0/, #$$ #63 6 6 #630/, #&,9 205 205 62%' 6$$ 6"//4 (/34 #0 63" 63! '0)/ 30) !$#). &,!' 39.
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L6474 Functional description 6 Functional description 6.1 Device power-up At power-up end, the device state is the following: ● Registers are set to default ● Internal logic is driven by internal oscillator and a 2 MHz clock is provided by the OSCOUT pin ● Bridges are disabled (High Z) ● UVLO bit in STATUS register is forced low (fail condition) ● FLAG output is forced low.
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Functional description Figure 5. 6.4 L6474 Charge pump circuitry Microstepping The driver is able to divide the single step into up to 16 microsteps. Stepping mode can be programmed by STEP_SEL parameter in STEP_MODE register (see Table 19). Step mode can only be changed when bridges are disabled. Every time the step mode is changed, the electrical position (i.e. the point of microstepping sinewave that is generated) is reset to the first microstep and the absolute position counter value (see Section 6.
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L6474 6.5 Functional description Absolute position counter An internal 22 bit register (ABS_POS) takes memory of motor motion according to the selected step mode; the stored value unit is equal to the selected step mode (full, half, quarter, etc.). The position range is from -221 to +221-1 (µ) steps (see Section 9.1.1). 6.6 Step sequence control The motor movement is defined by the step clock signal applied to the STCK pin.
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Functional description 6.8 L6474 Internal oscillator and oscillator driver The control logic clock can be supplied by the internal 16 MHz oscillator, an external oscillator (crystal or ceramic resonator) or a direct clock signal. These working modes can be selected by EXT_CLK and OSC_SEL parameters in the CONFIG register (see Table 23). At power-up the device starts using the internal oscillator and provides a 2 MHz clock signal on the OSCOUT pin.
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L6474 Functional description Figure 7. OSCIN and OSCOUT pin configurations Note: When OSCIN is UNUSED, it should be left floating. When OSCOUT is UNUSED it should be left floating. 6.9 Overcurrent detection When the current in any of the power MOSFETs exceeds a programmed overcurrent threshold, the STATUS register OCD flag is forced low until the overcurrent event has expired and a GetStatus command is sent to the IC (see Section 9.1.13 and Section 9.1.9).
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Functional description 6.10 L6474 Undervoltage lock-out (UVLO) The L6474 provides a motor supply UVLO protection. When the motor supply voltage falls below the VSthOff threshold voltage, the STATUS register UVLO flag is forced low. When a GetStatus command is sent to the IC, and the undervoltage condition has expired, the UVLO flag is released (see Section 9.1.13 and Section 9.2.7). Undervoltage condition expires when the motor supply voltage goes over the VSthOn threshold voltage.
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L6474 Functional description 6.13 Programmable DMOS slew-rate, dead-time and blanking-time Using the POW_SR parameter in the CONFIG register, it is possible to set the commutation speed of the power bridges output (see Table 25). 6.14 Integrated analog to digital converter The L6474 integrates a NADC bit ramp-compare analog to digital converter with a reference voltage equal to VREG.
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Functional description 6.16 L6474 SYNC pin This pin works as a synchronization signal: the output status is an echo of one of the bits of the EL_POS register according to a SYNC_SEL and STEP_SEL parameter combination (see paragraph 9.1.10). 6.
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L6474 7 Phase current control Phase current control The L6474 performs a peak current control technique described in detail in Section 7.1. Furthermore, the L6474 automatically selects the best decay mode in order to follow the current profile. Current control algorithm parameters can be programmed by T_FAST, TON_MIN, TOFF_MIN and CONFIG registers (see Section 9.1.5, Section 9.1.6, Section 9.1.7 and Section 9.1.12 for details). The current amplitude can be set through the TVAL register (see Section 9.1.
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Phase current control 7.2 L6474 Auto-adjusted decay mode During the current control, the device automatically selects the best decay mode in order to follow the current profile reducing the current ripple. At reset, the OFF time is performed by turning on both the low-side MOS of the power stage and the current recirculates in the lower half of the bridge (slow decay).
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L6474 Phase current control Figure 11. Adaptive decay - switch from normal to slow+fast decay mode and vice versa nd fast decay switch to fast + slow decay mode 1st fast decay 2 reference current Time tOFF tOFF tFAST tOFF,SLOW tOFF,FAST Target current is increased (raising step) system returns to slow decay mode and tFAST value is halved reference current Time 7.
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Phase current control L6474 Figure 12. Fast decay tuning during the falling steps &ALLING STEP ST FAST DECAY T&!,, &!,,?34%0 &ALLING STEP ST FAST DECAY T&!,, &!,,?34%0 REFERENCE CURRENT ND FAST DECAY T&!,, &!,,?34%0 4IME 7.4 Torque regulation (output current amplitude regulation) The output current amplitude can be regulated in two ways: writing the TVAL register or varying the ADCIN voltage value. The EN_TQREG bit (CONFIG register) sets the torque regulation method.
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L6474 8 Serial interface Serial interface The integrated 8-bit serial peripheral interface (SPI) is used for a synchronous serial communication between the host microprocessor (always master) and the L6474 (always slave). The SPI uses chip select (CS), serial clock (CK), serial data input (SDI) and serial data output (SDO) pins. When CS is high, the device is unselected and the SDO line is inactive (high-impedance). The communication starts when CS is forced low.
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Serial interface L6474 Figure 14.
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L6474 Programming manual 9 Programming manual 9.1 Registers and flags description The following is a map of the user registers available (detailed description in respective paragraphs): Table 9. Register map Address [Hex] Register name Len.
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Programming manual Table 9. L6474 Register map (continued) Address [Hex] Register name h19 STATUS h1A RESERVED Reserved address h1B RESERVED Reserved address Register function Len. [bit] Reset Hex 16 XXXX (2) Status Remarks Reset Value (1) High impedance state, UVLO/Reset flag set. R 1. R: Readable, WH: writable only when outputs are in high impedance, WR: always writable. 2. According to startup conditions. 9.1.
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L6474 Programming manual Table 11. Torque regulation register TVAL [6..0] 0 0 0 0 0 0 0 31.25 mA 0 0 0 0 0 0 1 62.5 mA … … … … … … … … 9.1.5 Output current amplitude 1 1 1 1 1 1 0 3.969 A 1 1 1 1 1 1 1 4A T_FAST The T_FAST register contains the maximum fast decay time (TOFF_FAST) and the maximum fall step time (FALL_STEP) used by the current control system (see Section 7.2 and Section 7.3 for details): Table 12.
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Programming manual Table 14. L6474 Minimum ON time Time 0 0 0 0 0 0 0 0.5 µs 0 0 0 0 0 0 1 1 µs … … … … … … … … 1 1 1 1 1 1 0 63.5 µs 1 1 1 1 1 1 1 64 µs Any attempt to write to the register when the outputs are enabled causes the command to be ignored and the NOTPERF_CMD to rise (see Section 9.1.13). 9.1.7 TOFF_MIN The TOFF_MIN register contains the minimum OFF time value used by the current control system (see Section 7.1 for details).
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L6474 9.1.8 Programming manual ADC_OUT The ADC_OUT register contains the result of the analog to digital conversion of the ADCIN pin voltage. Any attempt to write to the register causes the command to be ignored and the NOTPERF_CMD flag to rise (see Section 9.1.13). Table 16. ADC_OUT value and torque regulation feature VADCIN/ VREG Output current amplitude 0 0 0 0 0 0 125 mA 1/32 0 0 0 0 1 250 mA … … … … … … … 9.1.9 ADC_OUT [4..0] 30/32 1 1 1 1 0 3.
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Programming manual 9.1.10 L6474 STEP_MODE The STEP_MODE register has the following structure: Table 18. STEP_MODE register Bit 7 Bit 6 1 Bit 5 Bit 4 Bit 3 1 (1) SYNC_SEL Bit 2 Bit 1 Bit 0 STEP_SEL 1. When the register is written this bit should be set to 1. The STEP_SEL parameter selects one of five possible stepping modes: Table 19. Step mode selection STEP_SEL[2..
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L6474 Programming manual The synchronization signal is obtained starting from electrical position information (EL_POS register) according to Table 10: Table 20. SYNC signal source SYNC_SEL[2..0] Source 0 0 0 EL_POS[7] 0 0 1 EL_POS[6] 0 1 0 EL_POS[5] 0 1 1 EL_POS[4] 1 0 0 EL_POS[3] 1 0 1 UNUSED (1) 1 1 0 UNUSED (1) 1 1 1 UNUSED (1) 1. When this value is selected the BUSY output is forced low.
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Programming manual 9.1.11 L6474 ALARM_EN The ALARM_EN register allows to select which alarm signals are used to generate the FLAG output. If the respective bit of the ALARM_EN register is set high, the alarm condition forces the FLAG pin output down. Table 21. 9.1.
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L6474 Programming manual The OSC_SEL and EXT_CLK bits set the system clock source: Table 23. Oscillator management EXT_CLK OSC_SEL[2..
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Programming manual L6474 Table 25. Programmable power bridge output slew-rate values Output Slew-rate (1) [V/μs] (1) POW_SR [1..0] 0 0 320 0 1 75 1 0 110 1 1 260 1. See SRout_r and SRout_f parameters in the electrical characteristics Table 5 for details. The TQREG bit sets if the torque regulation (see Section 7.4) is performed through the ADCIN voltage (external) or TVAL register (internal): Table 26.
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L6474 Programming manual The UVLO flag is active low and is set by an undervoltage lock-out or reset events (powerup included). The TH_WRN, TH_SD, OCD flags are active low and indicate, respectively, thermal warning, thermal shutdown and overcurrent detection events. The NOTPERF_CMD and WRONG_CMD flags are active high and indicate, respectively, that the command received by SPI can't be performed or does not exist at all.
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Programming manual L6474 Figure 15. Command with three-byte argument By default, the device returns an all zeroes response for any received byte, the only exceptions are GetParam and GetStatus commands. When one of these commands is received, the following response bytes represent the related register value (see Figure 16). Response length can vary from 1 to 3 bytes. Figure 16. Command with three-byte response During response transmission, new commands can be sent.
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L6474 9.2.3 Programming manual SetParam (PARAM, VALUE) Table 32. SetParam command structure Bit 7 Bit 6 Bit 5 0 0 0 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PARAM From host VALUE Byte 2 (if needed) VALUE Byte 1 (if needed) VALUE Byte 0 The SetParam command sets the PARAM register value equal to VALUE; PARAM is the respective register address listed in Table 16. The command should be followed by the new register VALUE (most significant byte first).
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Programming manual L6474 Any attempt to read an inexistent register (wrong address value) causes the command to be ignored and the WRONG_CMD flag to rise at the end of command byte, the same is true when an unknown command code is sent. 9.2.5 Enable Table 34. HardStop command structure Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 1 0 1 1 1 0 0 0 from host The Enable command turns on the power stage of the device.
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L6474 10 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 37. HTSSOP28 mechanical data mm Dim Min. Typ. Max. A 1.2 A1 0.15 A2 0.8 b 0.19 0.3 c 0.09 0.2 D (1) 9.6 D1 1.0 9.7 1.05 9.8 5.5 E 6.
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Package mechanical data L6474 Figure 18.
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L6474 Package mechanical data Table 38. POWERSO36 mechanical data mm inch Dim. Min. Typ. A a1 Max. Min. Typ. 3.60 0.10 0.30 a2 Max. 0.1417 0.003 0.0118 3.30 0.1299 a3 0 0.10 0 0.0039 b 0.22 0.38 0.008 0.0150 c 0.23 0.32 0.009 0.0126 D (1) 15.80 16.00 0.622 0.6299 D1 9.40 9.80 0.370 0.3858 E 13.90 14.50 0.547 0.5709 E1 (1) 10.90 11.10 0.429 0.4370 E2 E3 2.90 5.8 6.2 0.1142 0.228 0.2441 e 0.65 0.025 e3 11.05 0.435 G 0 0.10 0.000 0.
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Package mechanical data L6474 Figure 19.
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L6474 11 Revision history Revision history Table 39. Document revision history Date Revision 02-Dec-2011 1 Initial release. 22-Dec-2011 2 Deleted previous chapter 6.4.1 Automatic full-step mode. Minor text changes. 3 Changed TOP value and Ptot value in Table 2. Removed Tj parameter in Table 3. Added typical values to Table 4. Updated HTSSOP28 mechanical data. Minor text changes.
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L6474 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.