Datasheet

EVAL6472H Board description
Doc ID 022980 Rev 1 3/11
Table 2. Jumpers and connectors description
Name Type Function
M1 Power supply Motor supply voltage
M2 Power output Bridge A outputs
M3 Power output Bridge B outputs
CN1 SPI connector Master SPI
CN2 SPI connector Slave SPI
CN3 NM connector OSCIN and OSCOUT pins
CN4 NM connector External switch input
TP1 (VS) Test point Motor supply voltage test point
TP2 (VDD) Test point Logic interface supply voltage test point
TP3 (VREG) Test point
Logic supply voltage/L6470 internal regulator test
point
TP5 (GND) Test point Ground test point
TP6 (GND) Test point Ground test point
TP8 (STCK) Test point Step clock input test point
TP9 (STBY/RES) Test point Standby/reset input test point
TP10 (FLAG) Test point FLAG output test point
TP11
(BUSY/SYNC)
Test point BUSY/SYNC output test point
Table 3. Master SPI connector pinout (J10)
Pin
number
Type Description
1 Open drain output L6472 BUSY output
2 Open drain output L6472 FLAG output
3 Ground Ground
4 Supply EXT_VDD (can be used as external logic power supply)
5 Digital output
SPI master IN slave OUT signal (connected to L6472 SDO
output through daisy chain termination jumper JP2)
6 Digital input SPI serial clock signal (connected to L6472 CK input)
7 Digital input
SPI master OUT slave IN signal (connected to L6472 SDI
input)
8 Digital input SPI slave select signal (connected to L6472 CS input)
9 Digital input L6472 step-clock input
10 Digital input L6472 standby/reset input