Datasheet

Power bridges L6460
78/139 Doc ID 17713 Rev 1
Figure 23. Simple buck regulator
When this control loop is intended to be used as a simple buck regulator, the proper
Aux3BatteryCharge bit must be written in the Aux3SwCfg1 register.
The regulator will also implement a soft start strategy.
When L6460 “low power mode” is enabled this regulator will be disabled.
Here after are summarized the primary features of the regulator:
– Internal power switch.
– Nonlinear pulse skipping control.
– Internally generated PWM (250 KHz switching frequency).
– Cycle by cycle current limiting using internal current sensor/ external current
sense differential amplifier.
– Protected against load short circuit.
– Soft start circuitry to limit inrush current flow from primary supply.
– Under voltage signal (both continuous and latched) accessible through SPI.
– Over temperature protection.
In pulse skipping control PWM the duty cycle must be decided by the user depending on
supply voltage and regulated voltage.
Therefore the switching regulator has 4 possible PWM duty cycles that can be changed
writing in the Aux3PWMTable[1:0] bits in the Aux3SwCfg1 register according to the
Tabl e 3 1.
IREF_FB
VREF_FB
COMP_I
COMP_V
PULSE SKIPPING
BURST
CONTROL LOGIC
PEAK CURRENT
MODE CONTROL
LOGIC
BRIDGE 4
PARALLELED
POWER
STAGE
SelFBRef<1:0>
DC4_plus
DC4_minus
SelCurrRef<1:0>
TO
LOAD
FBRef
CurrRef
Ilimit
PWM
L6460