Datasheet
L6460 Power bridges
Doc ID 17713 Rev 1 75/139
voltage thresholds) using serial interface. The feedback reference voltage is selected by
writing the SelFBRef[1:0] bits in the Aux1SwCfg or Aux2SwCfg registers.
The switching regulators have four possible PWM duty cycles that can be changed using
SPI according to Tabl e 28 .
14.1.7 Regulation loop
As seen before L6460 contains 2 regulation loops for switching regulators that are used
when bridge 3 is used as a regulator. These loops are assembled using internal
comparators and filters similar to that used in main switching regulator.
When bridge 3 is not used for this purpose or when only one regulation loop is needed, the
control loop is available on a GPIO output thus enabling the customer to assembly a basic
buck switching regulator using an external Power FET. The comparators used in the above
mentioned regulation loops are general purpose low voltage (3.3 V) comparators; when the
relative regulation loop is not used they can be accessed as shown in the Figure 20.
Figure 20. Internal comparator functional block diagram
Table 28. PWM specification
AuxXPWMTable[1:0] Typical duty cycle value Comments
00 10%
01 13% Default state for AUX1
10 24% Default state for AUX2
11 61%
GPIOz
GPIOx
GPIOx
DECODE
LOGIC
GPIOy
GPIOy
DECODE
LOGIC
GPIOz Logic
Driver
-
+
V
3v3
GPIOz
DECODE
LOGIC
GPIOz Value From SPI
GPIOxMode
GPIOzMod
e
GPIOyMode