Datasheet

Power bridges L6460
68/139 Doc ID 17713 Rev 1
An internal DAC is used to digitally control the output regulated current. The available values
are chosen to provide a quasi sinusoidal profile of the current. The current limit in each
phase is decided by PhADAC[3:0] bits for phase A and PhBDAC[3:0] bits for phase B. The
table below describes the relation between the value programmed in the stepper DAC and
the current level.
Note: The min and max values are guaranteed by testing the percentage of VSTEPREF that
allows the commutation of the Rsense comparator.
I
MAX
=V
STEPREF
/ R
SENSE
.
To obtain the best phase approximation of a sinusoidal wave, the user needs to repeat the
final (100%) value. So the full values sequence should be as follows: 0, 1, 2, 3 … D, E, F, F,
F, E, D … 3, 2, 1, 0.
Even if the total spread shows overlapping between current steps, the monotonicity is
guaranteed by design.
When the internal sequencer the minimum angle resolution is nominally 5.625°, so
depending on the control mode chosen, the selectable steps are Tab l e 2 5.
Table 24. DAC
PhXDAC [3:0]
Phase current ratio respect to I
MAX
Min Typ Max Unit
0000 (Hi-Z)
0001 - 9.8 - % of I
MAX
0010 - 19.5 - % of I
MAX
0011 - 29.0 - % of I
MAX
0100 - 38.3 - % of I
MAX
0101 - 47.1 - % of I
MAX
0110 - 55.6 - % of I
MAX
0111 - 63.4 - % of I
MAX
1000 - 70.7 - % of I
MAX
1001 - 77.3 - % of I
MAX
1010 - 83.1 - % of I
MAX
1011 - 88.2 - % of IMAX
1100 - 92.4 - % of I
MAX
1101 - 95.7 - % of I
MAX
1110 - 98.1 - % of I
MAX
1111 - I
MAX
-