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This is information on a product in full production.

February 2014 DocID9453 Rev 2 1/32

L6227

DMOS dual full bridge driver with PWM current controller

Datasheet - production data

Features

 Operating supply voltage from 8 to 52 V

 2.8 A output peak current (1.4 A DC)

 R

DS(ON)

0.73  typ. value at T

= 25 °C

 Operating frequency up to 100 KHz

 Non-dissipative overcurrent protection

 Dual independent constant t

OFF

PWM current

controllers

 Slow decay synchronous rectification

 Cross conduction protection

 Thermal shutdown

 Undervoltage lockout

 Integrated fast freewheeling diodes

Applications

 Bipolar stepper motor

 Dual DC motor

Description

The L6227 device is a DMOS dual full bridge

designed for motor control applications, realized

in BCD technology, which combines isolated

DMOS power transistors with CMOS and bipolar

circuits on the same chip. The device also

includes two independent constant off time PWM

current controllers that performs the chopping

regulation. Available in PowerDIP24 (20 + 2 + 2),

PowerSO36 and SO24 (20 + 2 + 2) packages, the

L6227 device features a non-dissipative

overcurrent protection on the high-side Power

MOSFETs and thermal shutdown.

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Summary of content (32 pages)

PAGE 1
L6227 DMOS dual full bridge driver with PWM current controller Datasheet - production data Features  Operating supply voltage from 8 to 52 V  2.8 A output peak current (1.4 A DC)  RDS(ON) 0.73  typ.
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Contents L6227 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Circuit description . . . . . . . . . . .
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L6227 1 Block diagram Block diagram Figure 1. Block diagram &+$5*( 3803 9%227 9%227 96$ 9%227 &855(17 /,0,7,1* 287 $ 9 (1$ 287 $ 9 ,1 $ 6(16( $ ,1 $ 21( 6+27 5&$ ,1+ 0$6.
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Maximum ratings 2 L6227 Maximum ratings Table 1. Absolute maximum ratings Symbol Test conditions Value Unit VSA = VSB = VS 60 V VSA = VSB = VS = 60 V; VSENSEA = VSENSEB = GND 60 V VSA = VSB = VS VS + 10 V Input and enable voltage range -0.3 to +7 V VREFA, VREFB Voltage range at pins VREFA and VREFB -0.3 to +7 V VRCA, VRCB Voltage range at pins RCA and RCB -0.
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L6227 Maximum ratings Table 3.
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Pin connections 3 L6227 Pin connections Figure 2.
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L6227 Pin connections Table 4. Pin description (continued) Package SO24/ PowerDIP24 PowerSO36 Name Type Function Pin no. Pin no. 6, 7, 18, 19 1, 18, 19, 36 GND GND Signal ground terminals. In PowerDIP and SO packages, these pins are also used for heat dissipation toward the PCB. 8 22 OUT1B Power output Bridge B output 1. 9 24 RCB RC pin RC network pin. A parallel RC network connected between this pin and ground sets the current controller OFF-time of the bridge B.
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Electrical characteristics 4 L6227 Electrical characteristics Table 5. Electrical characteristics (Tamb = 25 °C, Vs = 48 V, unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit VSth(ON) Turn-on threshold 5.8 6.3 6.8 V VSth(OFF) Turn-off threshold 5 5.
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L6227 Electrical characteristics Table 5. Electrical characteristics (Tamb = 25 °C, Vs = 48 V, unless otherwise specified) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit VRCA = VRCB = 2.5 V 3.5 5.5 mA ±5 mV 500 ns 1 µs PWM comparator and monostable IRCA, IRCB Source current at pins RCA and RCB Voffset Offset voltage on sense comparator VREFA, VREFB = 0.
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Electrical characteristics L6227 Figure 4.
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L6227 Circuit description 5 Circuit description 5.1 Power stages and charge pump The L6227 device integrates two independent power MOS full bridges. Each power MOS has an RDS(ON) = 0.73 (typical value at 25 °C), with intrinsic fast freewheeling diode. Cross conduction protection is achieved using a deadtime (td = 1 s typical) between the switch off and switch on of two power MOS in one leg of a bridge.
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Circuit description L6227 a pull-up resistor REN and a capacitor CEN are connected as shown in Figure 7. If the driver is a standard push-pull structure the resistor REN and the capacitor CEN are connected as shown in Figure 8. The resistor REN should be chosen in the range from 2.2 k to 180 K. Recommended values for REN and CEN are respectively 100 K and 5.6 nF. More information on selecting the values is found in Section 7.1: Non-dissipative overcurrent protection on page 18. Figure 6.
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L6227 Circuit description Table 7. Truth table Inputs Outputs Description(1) EN IN1 IN2 OUT1 OUT2 L X(2) X(2) High Z(3) High Z(3) Disable H L L GND GND Brake mode (lower path) H H L Vs GND (Vs)(4) Forward H L H GND (Vs) Vs Reverse H H H Vs Vs Brake mode (upper path) 1. Valid only in case of load connected between OUT1 and OUT2. 2. X = don't care. 3. High Z= high impedance output. 4. GND (Vs) = GND during tON, Vs during tOFF.
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PWM current control 6 L6227 PWM current control The L6227 device includes a constant off time PWM current controller for each of the two bridges. The current control circuit senses the bridge current by sensing the voltage drop across an external sense resistor connected between the source of the two lower power MOS transistors and ground, as shown in Figure 9. As the current in the load builds up the voltage across the sense resistor increases proportionally.
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L6227 PWM current control Figure 10. Output current regulation waveforms ,287 95() 56(16( W21 W2)) W2)) PV W%/$1. 96(16( PV W%/$1.
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PWM current control L6227 Figure 11 shows the magnitude of the Off time tOFF versus COFF and ROFF values. It can be approximately calculated from the equations: Equation 1 tRCFALL = 0.6 · ROFF · COFF tOFF = tRCFALL + tDT = 0.6 · ROFF · COFF + tDT where ROFF and COFF are the external component values and tDT is the internally generated deadtime with: Equation 2 20 K  ROFF  100 K 0.47 nF  COFF  100 nF tDT = 1 µs (typical value) Therefore: Equation 3 tOFF(MIN) = 6.
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L6227 PWM current control Figure 11. tOFF versus COFF and ROFF 52)) 52)) W2)) > 5 2)) &2)) >Q)@ $0 Figure 12.
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Slow decay mode 7 L6227 Slow decay mode Figure 13 shows the operation of the bridge in the slow decay mode. At the start of the off time, the lower power MOS is switched off and the current recirculates around the upper half of the bridge. Since the voltage across the coil is low, the current decays slowly. After the deadtime the upper power MOS is operated in the synchronous rectification mode.
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L6227 Slow decay mode Figure 14. Overcurrent protection simplified schematic 287 $ 96$ 287 $ 32:(5 6(16( FHOO +,*+ 6,'( '026V 2) 7+( %5,'*( $ , $ 32:(5 '026 Q FHOOV 72 *$7( /2*,& 32:(5 '026 Q FHOOV 32:(5 6(16( FHOO 2&' &203$5$725 9 , $ , $ Q , $ Q , $ , $ Q 5(1 (1$ ,5() ,17(51$/ 23(1 '5$,1 &(1 29(57(03(5$785( ' ,1 9 Figure 15 shows the overcurrent detection operation.
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Slow decay mode L6227 Figure 15. Overcurrent protection waveforms IOUT ISOVER VEN VDD Vth(ON) Vth(OFF) VEN(LOW) ON OCD OFF ON tDELAY BRIDGE tDISABLE OFF tOCD(ON) tEN(FALL) tOCD(OFF) tEN(RISE) tD(ON)EN tD(OFF)EN D02IN1400 Figure 16.
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L6227 Slow decay mode Figure 17. tDELAY versus CEN (VDD = 5 V) W '(/$< > & (1 >Q)@ $0 7.2 Thermal protection In addition to the overcurrent protection, the L6227 device integrates a thermal protection for preventing the device destruction in case of junction overtemperature. It works sensing the die temperature by means of a sensible element integrated in the die. The device switches-off when the junction temperature reaches 165 °C (typ. value) with 15 °C hysteresis (typ.
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Application information 8 L6227 Application information A typical application using the L6227 device is shown in Figure 18. Typical component values for the application are shown in Table 3. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power pins (VSA and VSB) and ground near the L6227 to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching.
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L6227 Application information Figure 18.
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Application information 8.1 L6227 Output current capability and IC power dissipation In Figure 19 and Figure 20 are shown the approximate relation between the output current and the IC power dissipation using PWM current control driving two loads, for two different driving types:  One full bridge ON at a time (Figure 19) in which only one load at a time is energized.  Two full bridges ON at the same time (Figure 20) in which two loads at the same time are energized.
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L6227 8.2 Application information Thermal management In most applications the power dissipation in the IC is the main factor that sets the maximum current that can be delivered by the device in a safe operating condition. Therefore, it has to be taken into account very carefully. Besides the available space on the PCB, the right package should be chosen considering the power dissipation. Heat sinking can be achieved using copper on the PCB with proper area and thickness.
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Application information L6227 Figure 23. PowerDIP24 junction ambient thermal resistance versus on-board copper area & : 2Q ERDUG FRSSHU DUHD &RSSHU DUHD LV RQ ERWWRP VLGH &RSSHU DUHD LV RQ WRS VLGH V T FP $0 Figure 24.
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L6227 9 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 25.
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Package information L6227 Table 9. PowerSO36 package mechanical data Dimensions Symbol mm Min. Typ. A a1 inch Max. Min. 3.60 0.10 Max. 0.141 0.30 a2 0.004 0.012 3.30 0.130 a3 0 0.10 0 0.004 b 0.22 0.38 0.008 0.015 c 0.23 0.32 0.009 0.012 D(1) 15.80 16.00 0.622 0.630 D1 9.40 9.80 0.370 0.385 E 13.90 14.50 0.547 0.570 e 0.65 0.0256 e3 11.05 0.435 (1) E1 10.90 11.10 E2 0.429 2.90 0.437 0.114 E3 5.80 6.20 0.228 0.244 E4 2.90 3.20 0.114 0.
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L6227 Package information Figure 26. PowerDIP24 package outline ( $ $ $ / % % H H ' F 0 6',3 / Table 10. PowerDIP24 package mechanical data Dimensions Symbol mm Min. Typ. A A1 inch Max. Min. Typ. 4.320 0.380 A2 Max. 0.170 0.015 3.300 0.130 B 0.410 0.460 0.510 0.016 0.018 0.020 B1 1.400 1.520 1.650 0.055 0.060 0.065 c 0.200 0.250 0.300 0.008 0.010 0.012 D 31.62 31.75 31.88 1.245 1.250 1.255 E 7.620 8.260 0.300 e E1 2.54 6.
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Package information L6227 Figure 27. SO24 package outline & Table 11. SO24 package mechanical data Dimensions Symbol mm Min. Typ. inch Max. Min. Typ. Max. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D(1) 15.20 15.60 0.598 0.614 E 7.40 7.60 0.291 0.299 e 1.27 0.050 H 10.0 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.40 1.27 0.016 0.050 k ddd 0° (min.), 8° (max.) 0.10 0.004 1.
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L6227 10 Revision history Revision history Table 12. Document revision history Date Revision 03-Sep-2003 1 Initial release. 2 Updated Section : Description on page 1 (removed “MultiPower-” from “MultiPower-BCD technology”. Added Contents on page 2. Updated Section 1: Block diagram (added section title, numbered and moved Figure 1: Block diagram to page 3. Added title to Section 2: Maximum ratings on page 4, added numbers and titles from Table 1: Absolute maximum ratings toTable 3: Thermal data.
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L6227 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.