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ESDA6V1U1

August 2002 - Ed: 3A

SO-8

FUNCTIONAL DIAGRAM

TRANSIL ARRAY

FOR ESD PROTECTION

Application Specific Discretes

A.S.D.

BENEFITS

High ESD protection level : up to 25 kV

High integration

Suitable for high density boards

IEC61000-4-2 : level 4

MIL STD 883C-Method 3015-6 : class3

(human body model)

COMPLIES WITH THE FOLLOWING STANDARDS :

Where transient overvoltage protection in ESD

sensitive equipment is required, such as :

■ COMPUTERS

■ PRINTERS

■ COMMUNICATION SYSTEMS

■ GSM HANDSETS AND ACCESSORIES

■ CAR RADIO

It is particulary recommended for parallel port

protection where the line interface withstands only

2 kV ESD surge.

APPLICATIONS

■ 6 UNIDIRECTIONAL TRANSIL FUNCTIONS

■ LOW LEAKAGE CURRENT: I

max. < 2 µA

■ 200 W PEAK PULSE POWER (8/20 µs)

FEATURES

DESCRITION

The ESDA6V1U1 is a monolithic voltage

suppressor designed to protect components which

are connected to data and transmission lines

against ESD.

It clamps the voltage just above the logic level

supply for positive transients, and to a diode drop

below ground for negative transients.

Summary of content (6 pages)

PAGE 1
ESDA6V1U1 Application Specific Discretes A.S.D. TRANSIL ARRAY FOR ESD PROTECTION APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : COMPUTERS PRINTERS COMMUNICATION SYSTEMS GSM HANDSETS AND ACCESSORIES CAR RADIO It is particulary recommended for parallel port protection where the line interface withstands only 2 kV ESD surge. ■ ■ ■ ■ ■ SO-8 FEATURES ■ ■ ■ 6 UNIDIRECTIONAL TRANSIL FUNCTIONS LOW LEAKAGE CURRENT: IR max.
PAGE 2
ESDA6V1U1 ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C) Symbol Parameter Value Unit VPP Electrostatic discharge MIL STD 883C - Method 3015-6 25 kV PPP Peak pulse power (8/20µs) 200 W Tstg Tj Storage temperature range Maximum junction temperature - 55 to + 150 125 °C °C TL Maximum lead temperature for soldering during 10s 260 °C ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol Parameter VRM Stand-off voltage VBR Breakdown voltage VCL Clamping voltage IRM Leakage current IPP Peak pulse
PAGE 3
ESDA6V1U1 CALCULATION OF THE CLAMPING VOLTAGE USE OF THE DYNAMIC RESISTANCE The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. The voltage across the protection cell can be calculated with the following formula: VCL = VBR + Rd IPP As the value of the dynamic resistance remains stable for a surge duration lower than 20µs, the 2.
PAGE 4
ESDA6V1U1 Fig. 1 : Peak power dissipation versus initial junction temperature. Fig. 2 : Peak pulse power versus exponential pulse duration (Tj initial = 25 °C). Fig. 3 : Clamping voltage versus peak pulse current (Tj initial = 25 °C). Rectangular waveform tp = 2.5 µs. Fig. 4 : Capacitance versus reverse applied voltage (typical values). Fig. 5 : Relative variation of leakage current versus junction temperature (typical values). Fig.
PAGE 5
ESDA6V1U1 APPLICATION EXAMPLE : Protection of logic-level signals. APPLICATION EXAMPLE : Protection of symmetrical signals. Note : Capacitance value between any I/O pin and Ground is divided by 2.
PAGE 6
ESDA6V1U1 ORDER CODE ESDA 6 V 1 U 1 RL PACKAGING: RL = Tape and reel = Tube PACKAGE: SO8 PLASTIC ESD ARRAY Unidirectionel VBR min MARKING : Logo, Date Code, E6V1U1 PACKAGE MECHANICAL DATA SO-8 Plastic DIMENSIONS REF. Millimetres Min. A a1 a2 b b1 C c1 D E e e3 F L M S Typ. Max. Inches Min. 1.75 0.25 0.004 1.65 0.48 0.014 0.25 0.007 0.1 0.35 0.19 0.50 Max. 0.069 0.010 0.065 0.019 0.010 0.020 45° (typ) 5.0 0.189 6.2 0.228 4.8 5.8 1.27 3.81 3.8 0.4 Typ. 0.197 0.244 0.050 0.150 4.0 0.15 1.