User Manual

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Document ID: PB-ZB-MOD-003-20DS
Table 5.1: Pad Description (cont)
Pad#
Signal
Direction
Description
20
PB1
I/O
Digital I/O.
SC1MISO
O
SPI slave data out of Serial Controller 1.
Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[4].
Select SPI with SC1_MODE.
Select slave with SC1_SPICR.
Select alternate output function with GPIO_PBCFGL[7:4].
SC1MOSI
O
SPI master data out of Serial Controller 1.
Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[4].
Select SPI with SC1_MODE.
Select master with SC1_SPICR.
Select alternate output function with GPIO_PBCFGL[7:4]
SC1SDA
I/O
TWI data of Serial Controller 1.
Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[4].
Select TWI with SC1_MODE.
Select alternate open-drain output function with GPIO_PBCFGL[7:4].
SC1TXD
O
UART transmit data of Serial Controller 1.
Either disable timer output in TIM2_CCER, or disable remap
with TIM2_OR[4].
Select UART with SC1_MODE.
Select alternate output function with GPIO_PBCFGL[7:4].
TIM2_CH1 (see
also Pad 12)
O
Timer 2 channel 1 output.
Enable remap with TIM2_OR[4].
Enable timer output in TIM2_CCER.
Select alternate output function with GPIO_PACFGL[7:4].
I
Timer 2 channel 1 input Disable remap with TIM2_OR[4].
21
PB2
I/O
Digital I/O
SC1MISO
I
SPI master data in of Serial Controller 1.
Select SPI with SC1_MODE.
Select master with SC1_SPICR.
SC1MOSI
I
SPI slave data in of Serial Controller 1.
Select SPI with SC1_MODE.
Select slave with SC1_SPICR
SC1SCL
I/O
TWI clock of Serial Controller 1.
Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[5].
Select TWI with SC1_MODE.
Select alternate open-drain output function with GPIO_PBCFGL[11 :8].
SC1RXD
I
UART receive data of Serial Controller 1.
Select UART with SC1_MODE.
TIM2_CH2 (see
also Pad 16)
O
Timer 2 channel 2 output.
Enable remap with TIM2_OR[5].
Enable timer output in TIM2_CCER.
Select alternate output function with GPIO_PBCFGL[11 :8].
I
Timer 2 channel 2 input.
Enable remap with TIM2_OR[5].
22
SWCLK
I/O
Serial Wire clock input/output with debugger.
Selected when in Serial Wire mode (see JTMS description, Pad 26)
JTCK
1
JTAG clock input from debugger.
Selected when in JTAG mode (default mode, see JTMS description,
Pad 26) Internal pull-down is enabled.
23
PC2
I/O
Digital I/O.
Enable with GPIO_DBGCFG[5].
JTDO
O
JTAG data out to debugger.
Selected when in JTAG mode (default mode, see JTMS description,
Pad 26).
SWO
O
Serial Wire Output asynchronous trace output to debugger.
Select asynchronous trace interface in ARM core.
Enable trace interface in ARM core.
Select alternate output function with GPIO_PCCFGL[11:8].
Enable Serial Wire mode (see JTMS description, Pad 26).
Internal pull-up is enabled.