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This is information on a product in full production.

September 2012 Doc ID 018878 Rev 2 1/12

DVIULC6-4SC6Y

Automotive ultralow capacitance ESD protection

Datasheet  production data

Features

■ 4-line ESD protection (IEC 61000-4-2)

■ Protects V

BUS

when applicable

■ Ultralow capacitance: 0.6 pF at F = 825 MHz

■ Fast response time compared with varistors

■ RoHS compliant

■ AEC-Q101 qualified

Benefits

■ ESD protection of V

BUS

■

Optimized rise and fall times for maximum data

integrity

■ Consistent D+ / D- signal balance:

– Optimum capacitance matching tolerance

for ultralow intra pair skew:

I/O to ground = 0.015 pF,

I/O to I/O = 0.007 pF

– Matching high bit rate DVI, HDMI, and

IDB 1394 bus requirements

■ Low PCB space occupation: 9 mm

■

Higher reliability offered by monolithic

integration

Complies with these standards

■ ISO 10605 (C = 330 pF, R = 330 

– 18 kV (air discharge)

– 18 kV (contact discharge)

■ ISO 10605 (C = 150 pF, R = 330 

– 18 kV (air discharge)

– 18 kV (contact discharge)

■ MIL STD883G-Method 3015-7

■ ISO 7637-2

– Pulse 3a: V

= -150 V

– Pulse 3b: V

= 100 V

Applications

■ DVI ports up to 1.65 Gb/s

■ HDMI ports up to 1.65 Gb/s

■ IDB 1394

■ USB 2.0 ports up to 480 Mb/s (high speed),

backwards compatible with USB1.1 low and full

speed

■ Ethernet port: 10/100/1000 Mb/s

■ SIM card protection

■ Video line protection

Description

The DVIULC6-4SC6Y is a monolithic, application

specific discrete device dedicated to ESD

protection of high speed interfaces, such as DVI,

HDMI, IDB 1394 bus, USB2.0, Ethernet links and

video lines.

Its ultralow line capacitance secures a high level

of signal integrity without compromise in

protecting sensitive chips against the most

stringently characterized ESD strikes.

SOT23-6L

(JEDEC MO178AB)

www.st.com

Summary of content (12 pages)

PAGE 1
DVIULC6-4SC6Y Automotive ultralow capacitance ESD protection Datasheet  production data Features ■ 4-line ESD protection (IEC 61000-4-2) ■ Protects VBUS when applicable ■ Ultralow capacitance: 0.6 pF at F = 825 MHz ■ Fast response time compared with varistors ■ RoHS compliant ■ AEC-Q101 qualified SOT23-6L (JEDEC MO178AB) Benefits Applications ■ ESD protection of VBUS ■ DVI ports up to 1.65 Gb/s ■ Optimized rise and fall times for maximum data integrity ■ HDMI ports up to 1.
PAGE 2
Characteristics 1 DVIULC6-4SC6Y Characteristics Figure 1. Table 1.
PAGE 3
DVIULC6-4SC6Y Figure 2. Characteristics Line capacitance versus line voltage (typical values) Figure 3. C(pF) Line capacitance versus frequency (typical values) C(pF) 1.0 1.0 F=825MHz Vosc=500mVRMS VBUS OPEN Tj =25 °C 0.9 0.8 0.7 Vosc=30mVRMS Tj =25°C VI-O/GND = 0V VBUS OPEN 0.9 0.8 0.7 0.6 0.6 0.5 CI/O - GND 0.5 0.4 0.4 0.3 0.3 0.2 CI/O - GND 0.2 0.1 CI/O - CI/O 0.1 Data line voltage (v) 0 F(MHz) 0 0.0 Figure 4. 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.
PAGE 4
Characteristics Figure 8. DVIULC6-4SC6Y Analog crosstalk results 0.00 dB - 30.00 - 60.00 - 90.00 F (Hz) - 120.00 100.0k Figure 9. 1.0M 10.0M ISO 7637-2 pulse 3a response (VS = -150 V) 1.0G Figure 10. ISO 7637-2 pulse 3b response (VS = 100 V) Voltage (V) 15 Voltage (V) 50 Voltage 10 Voltage 40 5 30 DVIUCL6-4SC6Y 0 DVIUCL6-4SC6Y 20 -5 10 -10 -15 - 0.1 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 Time (µs) 0.1 0.3 0.5 0.7 0.9 Current (A) -0.1 4/12 100.0M 0 Time (µs) -10 - 0.
PAGE 5
DVIULC6-4SC6Y Application examples More information is available in the STMicroelectronics Application note AN2689 “Protection of automotive electronics from electrical hazards, guidelines for design and component selection”. Figure 11.
PAGE 6
Technical information DVIULC6-4SC6Y 3 Technical information 3.1 Surge protection The DVIULC6-4SC6Y is particularly optimized to perform ESD surge protection based on the rail to rail topology. The clamping voltage VCL can be calculated as follows: VCL+ = VBUS + VF, for positive surges VCL- = - VF, for negative surges with: VF = VT + Rd.
PAGE 7
DVIULC6-4SC6Y 3.3 Technical information How to ensure good ESD protection While the DVIULC6-4SC6Y provides a high immunity to ESD surge, an efficient protection depends on the layout of the board. In the same way, with the rail to rail topology, the track from VBUS pin to the power supply +VCC, and from VBUS pin to GND pin must be as short as possible to avoid over voltages due to parasitic phenomena (see Figure 13 and Figure 14 for layout considerations). Figure 13.
PAGE 8
Technical information DVIULC6-4SC6Y Figure 15. PCB layout considerations (VCC connection is application dependent) 1 D+1 DVI D-1 VCC connector GND side C = 100 nF D+2 D-2 DVIULC6-4SC6 It’s often harder to connect the power supply near to the DVIULC6-4SC6Y unlike the ground thanks to the ground plane that allows a short connection.
PAGE 9
DVIULC6-4SC6Y Crosstalk behavior Figure 17. Crosstalk phenomena RG1 Line 1 VG1 RL1 RG2 α 1 VG1 + β12VG2 Line 2 VG2 α 2VG2 + β21VG1 RL2 DRIVERS RECEIVERS The crosstalk phenomena is due to the coupling between 2 lines. The coupling factor (12 or 21) increases when the gap across lines decreases, particularly in silicon dice. In the example above the expected signal on load RL2 is 2VG2, in fact the real voltage at this point has got an extra value 21VG1.
PAGE 10
Package information 4 DVIULC6-4SC6Y Package information ● Epoxy meets UL94, V0 ● Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 3. SOT23-6L dimensions Dimensions Ref. Millimeters Min. Typ. Max. c L H A E Min. Typ. Max. A 0.
PAGE 11
DVIULC6-4SC6Y 5 Ordering information Ordering information Table 4. 6 Ordering information Order code Marking Package Weight Base qty Delivery mode DVIULC6-4SC6Y DL4Y SOT23-6L 16.7 mg 3000 Tape and reel Revision history Table 5. Document revision history Date Revision Changes 24-May-2011 1 First issue. 06-Sep-2012 2 Updated dimension A1 max., b min., and L min. in Table 3.
PAGE 12
DVIULC6-4SC6Y Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.