Datasheet

CLT3-4B Application information
9/13
Figure 10. Current sharing in the CLT device when IN
4
is biased at - 30 V and the
others at + 30 V, R
I
= 1.8 kΩ
Figure 11. TSSOP20 printed circuit board example
The input and supply pins are designed to withstand electromagnetic interferences. As
shown on the device block diagram, each channel input is protected by a clamping diode
that is connected to the common pin COM. Combined with a serial input resistance
R
I
= 1.2 kΩ, this clamping diode implements an effective protection against transient voltage
burst (± 4 kV, IEC 61000-4-4) and voltage surge (± 1 kV, IEC 61000-4-5).
OPTO
N
1.8 kΩ
I
1
I
2
=-
COM
OUT
1
OUT
2
I
REG4
V
C
CLT3 - 4
IN
4
IN
N
OPTO
4
I
REG N
V
CL
= 38 V
1.8 kΩ
OPTO
N
4.7 k Ω
I
1
= + 30 V
I
2
= -30 V
GND (0 V)
Vcc = + 30 V
0.8 mA
3.7 mA
16.2 mA
COM
OUT
1
OUT
2
I
REG4
V
C
CLT3 - 4
IN
4
IN
N
OPTO
4
I
REG N
GND
COOLING PAD
COMMON PAD
COM
IN
1
ESD
12
IN
2
OUT
1
OUT
2
OUT
4
OUT
3
COM
34
ESD
34
COM
COM
IN
3
IN
4
COM
12
V
C
ESD
C
COM
COM
COM
MODULE
CONNECTOR
GND
COOLING PAD
COMMON PAD
COM
IN
1
ESD
12
IN
2
OUT
1
OUT
2
OUT
4
OUT
3
COM
34
ESD
34
COM
COM
IN
3
IN
4
COM
12
V
C
ESD
C
COM
COM
COM
COM
IN
1
ESD
12
IN
2
OUT
1
OUT
2
OUT
4
OUT
3
COM
34
ESD
34
COM
COM
IN
3
IN
4
COM
12
V
C
ESD
C
COM
COM
COM
MODULE
CONNECTOR