Data Sheet

BlueNRG-M2SA
P a g e | 14 Rev. 0.1
5 Hardware design
Note:
-
All unused pins should be left floating; do not ground.
- GND pin must be well grounded.
- Traces should not be routed underneath the module.
- The area around the module should be free of any ground planes, power planes,
trace routings, or metal for 6 mm from the module antenna position, in all directions.
5.1 Reset Circuitry
The BLUENRG-M2SA module requires an external pull-up reset circuitry to ensure proper operation at
power on. Refer to the “Reset management” chapter of the BlueNRG-2 datasheet for details.
Figure 10: Reset Circuitry
If reset pin is controlled by an external host, there is no need to have RC circuit on the RESETn line.
5.2 Debug Interface
The BLUENRG-M2SA embeds the ARM serial wire debug (SWD) port. It is two pins (clock and single bi-
directional data) debug interface, providing all the debug functionality plus real time access to system
memory without halting the processor or requiring any target resident code.
Pin Functionality Module PIN Pin description
SWCLK 12 SWD clock signal
SWDIO 13 SWD data signal
Table 6: Debug interface pin