Data Sheet

6/19
DocID027851 Rev 1.0
BLUENRG-M0x
Software architecture
3 Software architecture
3.1 Bluetooth firmware implementation
The BlueNRG-M0x modules have been designed to work with an external Host processor.
The external Host application processor, where the application resides, is interfaced with
the BlueNRG-MS inside the BlueNRG-M0x modules through an application controller
interface (ACI) protocol which is based on a standard SPI slave interface as transport
layer, basing in five physical wires:
 2 control wires (Clock and “Chip Select”)
 2 data wires with serial shift-out (MOSI and MISO) in full duplex
 1 wire to indicate data availability from the slave (IRQ)
All the SPI pins have an internal pull-down except for the CS that has a pull-up. All the
SPI pins, except the CS, are in high impedance state during the low-power states. The
IRQ pin needs a pull-down external resistor.
Figure 2. BLUENRG-M0A and BLUENRG-M0L application block diagram