Datasheet

DocID14117 Rev 4 9/44
B5973D Functional description
44
5 Functional description
The main internal blocks are shown in the device block diagram in Figure 3. They are:
 A voltage regulator supplying the internal circuitry. From this regulator, a 3.3 V
reference voltage is externally available.
 A voltage monitor circuit which checks the input and the internal voltages.
 A fully integrated sawtooth oscillator with a frequency of 250 kHz 15 %, including also
the voltage feed forward function and an input/output synchronization pin.
 Two embedded current limitation circuits which control the current that flows through
the power switch. The pulse-by-pulse current limit forces the power switch OFF cycle
by cycle if the current reaches an internal threshold, while the frequency shifter reduces
the switching frequency in order to significantly reduce the duty cycle.
 A transconductance error amplifier.
 A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to
drive the internal power.
 A high side driver for the internal P-MOS switch.
 An inhibit block for standby operation.
 A circuit to implement the thermal protection function.
Figure 3. Block diagram
9
,1+
&203
)%
75,00,1*
,1+,%,7
92/7$*(6
021,725
7+(50$/
6+87'2:1
6833/<
95()
%8))(5
3($.723($.
&855(17/,0,7
)5(48(1&<
6+,)7(5
4
4
6(7
&/5
'




9 9
287
95()
*1'
26&,//$725
6<1&
9&&
3:0
($
'5,9(5
/3'026
32:(5
$0