Datasheet

Functional description B5973D
12/44 DocID14117 Rev 4
Figure 6. Synchronization example
5.4 Current protection
The B5973D features two types of current limit protection: pulse-by-pulse and frequency
foldback.
The schematic of the current limitation circuitry for the pulse-by-pulse protection is shown in
Figure 7. The output power PDMOS transistor is split into two parallel PDMOS transistors.
The smallest one includes a resistor in series, R
SENSE
. The current is sensed through
R
SENSE
and if it reaches the threshold, the mirror becomes unbalanced and the PDMOS is
switched off until the next falling edge of the internal clock pulse. Due to this reduction of the
ON time, the output voltage decreases. Since the minimum switch ON time necessary to
sense the current in order to avoid a false overcurrent signal is too short to obtain
a sufficiently low duty cycle at 250 kHz (see Section 8.4: Short-circuit protection on
page 28), the output current in strong overcurrent or short-circuit conditions could be not
properly limited. For this reason the switching frequency is also reduced, thus keeping the
inductor current under its maximum threshold. The frequency shifter (Figure 5) functions
based on the feedback voltage. As the feedback voltage decreases (due to the reduced
duty cycle), the switching frequency decreases also.
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