Datasheet

DocID022801 Rev 5 27/42
A7986A Application information
6.5 Thermal considerations
The thermal design is important to prevent the thermal shutdown of the device if junction
temperature goes above 150 °C. The three different sources of losses within the device are:
a) conduction losses due to the not negligible R
DS(on)
of the power switch; these are
equal to:
Equation 34
where D is the duty cycle of the application and the maximum R
DS(on)
over temperature is
220 mΩ. Note that the duty cycle is theoretically given by the ratio between V
OUT
and V
IN
,
but actually it is quite higher to compensate the losses of the regulator. So the conduction
losses increase compared with the ideal case.
b) switching losses due to power MOSFET turn ON and OFF; these can be
calculated as:
Equation 35
where T
RISE
and T
FALL
are the overlap times of the voltage across the power switch (V
DS
)
and the current flowing into it during turn ON and turn OFF phases, as shown in Figure 16.
T
SW
is the equivalent switching time. For this device the typical value for the equivalent
switching time is 40 ns.
c) Quiescent current losses, calculated as:
Equation 36
where I
Q
is the quiescent current (I
Q
= 2.4 mA).
The junction temperature T
J
can be calculated as:
Equation 37
where T
A
is the ambient temperature and P
TOT
is the sum of the power losses just seen.
R
th(JA)
is the equivalent thermal resistance junction to ambient of the device; it can be
calculated as the parallel of many paths of heat conduction from the junction to the ambient.
For this device the path through the exposed pad is the one conducting the largest amount
of heat. The R
th(JA)
measured on the demonstration board described in the following
paragraph is about 40 °C/W for the HSOP8 package.
P
ON
R
DS on ()
I
OUT
()
2
D⋅⋅=
P
SW
V
IN
I
OUT
T
RISE
T
FALL
+()
2
------------------------------------------- Fsw⋅⋅ ⋅ V
IN
I
OUT
T
SW
F
SW
⋅⋅⋅==
P
Q
V
IN
I
Q
⋅=
T
J
T
A
Rth
JA
P
TOT
⋅+=