Datasheet

A5972D Functional description
Doc ID 13956 Rev 5 9/37
5.2 Voltages monitor
An internal block continuously senses the V
cc
, V
ref
and V
bg
. If the voltages go higher than
their thresholds, the regulator begins operating. There is also a hysteresis on the V
CC
(UVLO).
Figure 4. Internal circuit
5.3 Current protection
The A5972D features two types of current limit protection: pulse-by-pulse and frequency
foldback.
The schematic of the current limitation circuitry for the pulse-by-pulse protection is shown in
Figure 5. The output power PDMOS transistor is split into two parallel PDMOS transistors.
The smallest one includes a resistor in series, R
SENSE
. The current is sensed through
R
SENSE
and if it reaches the threshold, the mirror becomes unbalanced and the PDMOS is
switched off until the next falling edge of the internal clock pulse. Due to this reduction of the
ON time, the output voltage decreases. Since the minimum switch ON time necessary to
sense the current in order to avoid a false overcurrent signal is too short to obtain a
sufficiently low duty cycle at 250 kHz (see Chapter 8.4), the output current in strong
overcurrent or short circuit conditions could be not properly limited. For this reason the
switching frequency is also reduced, thus keeping the inductor current under its maximum
threshold. The frequency shifter (Figure 5) functions based on the feedback voltage. As the
feedback voltage decreases (due to the reduced duty cycle), the switching frequency
decreases also.