Datasheet

X24C08
11
WRITE CYCLE LIMITS
Symbol Parameter Min. Typ.
(5)
Max. Units
t
WR
(6)
Write Cycle Time 5 10 ms
3842 PGM T08
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the X24C08
bus interface circuits are disabled, SDA is allowed to
remain high, and the device does not respond to its slave
address.
3842 FHD F05
Write Cycle Timing
Notes: (5) Typical values are for T
A
= 25°C and nominal supply voltage (5V).
(6) t
WR
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the
device requires to perform the internal write operation.
SYMBOL TABLE
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
OUTPUTSINPUTSWAVEFORM
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
3842 FHD F17
120
100
80
40
60
20
20 40 60 80
100
120
0
0
RESISTANCE (KΩ)
BUS CAPACITANCE (pF)
MIN.
RESISTANCE
MAX.
RESISTANCE
R
MAX
=
C
BUS
t
R
MAX
R
MIN
=
I
OL MIN
V
CC MAX
=1.8KΩ
SCL
SDA
8th BIT
WORD n
ACK
t
WR
STOP
CONDITION
START
CONDITION
X24C08
ADDRESS