Datasheet

ManualsBrandsST ManualsDiscrete SemiconductorsMOSFET, 70V, 5A, 1.1ps

VNP5N07

"OMNIFET":

FULLY AUTOPROTECTED POWER MOSFET

March 2004

TO-220

BLOCK DIAGRAM

TYPE V

clamp

DS(on)

lim

VNP5N07 70 V 0.2 Ω 5 A

■ LINEAR CURRENT LIMITATION

■ THERMAL SHUT DOWN

■ SHORT CIRCUIT PROTECTION

■ INTEGRATED CLAMP

■ LOW CURRENT DRAWN FROM INPUT PIN

■ DIAGNOSTIC FEEDBACK THROUGH INPUT

■ ESD PROTECTION

■ DIRECT ACCESS TO THE GATE OF THE

POWER MOSFET (ANALOG DRIVING)

■ COMPATIBLE WITH STANDARD POWER

MOSFET

■ STANDARD TO-220 PACKAGE

DESCRIPTION

The VNP5N07 is a monolithic device made using

STMicroelectronics VIPower M0 Technology,

intended

for replacement of standard power

MOSFETS in DC to 50 KHz applications.

Built in thermal shut-down, linear current limi-

tation and overvoltage clamp protect the chip

in harsh enviroments.

Fault feedback can be detected by monitoring the

voltage at the input pin.

1/11

Summary of content (11 pages)

PAGE 1
VNP5N07 "OMNIFET": FULLY AUTOPROTECTED POWER MOSFET TYPE VNP5N07 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ V clamp R DS(on) I lim 70 V 0.
PAGE 2
VNP5N07 ABSOLUTE MAXIMUM RATING Symbol Parameter Value Unit Internally Clamped V Input Voltage 18 V ID Drain Current Internally Limited A IR Reverse DC Output Current -7 A 2000 V V DS Drain-source Voltage (V in = 0) V in V esd Ptot Tj Tc T stg Electrostatic Discharge (C= 100 pF, R=1.
PAGE 3
VNP5N07 ELECTRICAL CHARACTERISTICS (continued) SWITCHING (∗∗) Symbol Parameter Test Conditions t d(on) tr t d(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time V DD = 15 V V gen = 10 V (see figure 3) I d = 2.5 A R gen = 10 Ω t d(on) tr t d(off) tf Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time V DD = 15 V V gen = 10 V (see figure 3) I d = 2.5 A R gen = 1000 Ω Turn-on Current Slope V DD = 15 V V in = 10 V I D = 2.
PAGE 4
VNP5N07 PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry.
PAGE 5
VNP5N07 Thermal Impedance Derating Curve Output Characteristics Transconductance Static Drain-Source On Resistance vs Input Voltage Static Drain-Source On Resistance 5/11
PAGE 6
VNP5N07 Static Drain-Source On Resistance Input Charge vs Input Voltage Capacitance Variations Normalized Input Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Normalized On Resistance vs Temperature 6/11
PAGE 7
VNP5N07 Turn-on Current Slope Turn-on Current Slope Turn-off Drain-Source Voltage Slope Turn-off Drain-Source Voltage Slope Switching Time Resistive Load Switching Time Resistive Load 7/11
PAGE 8
VNP5N07 Switching Time Resistive Load Current Limit vs Junction Temperature Step Response Current Limit Source Drain Diode Forward Characteristics 8/11
PAGE 9
VNP5N07 Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Input Charge Test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times Fig.
PAGE 10
VNP5N07 TO-220 MECHANICAL DATA mm. DIM. MIN. MAX. A 4.40 4.60 b 0.61 0.88 b1 1.15 1.70 c 0.49 0.70 D 15.25 15.75 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 Package Weight 10/11 TYP 1.9Gr. (Typ.
PAGE 11
VNP5N07 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice.