Datasheet

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STM8S105x4/6 Electrical characteristics
90
t
r(SCK
)
t
f(SCK)
SPI clock rise and fall
time
Capacitive load: 
C = 30 pF
-25
ns
t
su(NSS)
(2)
NSS setup time Slave mode 4 * t
MASTER
-
t
h(NSS)
(2)
NSS hold time Slave mode 70 -
t
w(SCKH)
(2)
t
w(SCKL)
(2)
SCK high and low time Master mode t
SCK
/2 - 15 t
SCK
/2 + 15
t
su(MI)
(2)
t
su(SI)
(2)
Data input setup time
Master mode 5 -
Slave mode 5 -
t
h(MI)
(2)
t
h(SI)
(2)
Data input hold time
Master mode 7 -
Slave mode 10 -
t
a(SO)
(2)(3)
Data output access time Slave mode - 3* t
MASTER
t
dis(SO)
(2)(4)
Data output disable time Slave mode 25 -
t
v(SO)
(2)
Data output valid time
Slave mode
(after enable edge)
-73
t
v(MO)
(2)
Data output valid time
Master mode (after
enable edge)
-36
t
h(SO)
(2)
Data output hold time
Slave mode (after
enable edge)
28 -
t
h(MO)
(2)
Master mode (after
enable edge)
12 -
1. Parameters are given by selecting 10 MHz I/O output frequency.
2. Values based on design simulation and/or characterization results, and not tested in production.
3. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
the data.
4. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
the data in Hi-Z.
Table 42. SPI characteristics (continued)
Symbol Parameter Conditions
(1)
Min Max Unit