Datasheet

Option byte STM8S105x4/6
46/121 DocID14771 Rev 15
8 Option byte
Option byte contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option byte can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in the table below.
Option byte can also be modified ‘on the fly’ by the application in IAP mode, except the ROP
option that can only be modified in ICP mode (via SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM
communication protocol and debug module user manual (UM0470) for information on SWIM
programming procedures.
Table 11. Option byte
Addr.
Option
name
Option
byte
no.
Option bits Factory
default
setting
7654 3 2 1 0
0x4800
Read-out
protection
(ROP)
OPT0 ROP [7:0] 0x00
0x4801
User boot
code (UBC)
OPT1 UBC [7:0] 0x00
0x4802 NOPT1 NUBC [7:0] 0xFF
0x4803 Alternate
function
remapping
(AFR)
OPT2 AFR7 AFR6 AFR5 AFR4 AFR3 AFR2 AFR1 AFR0 0x00
0x4804 NOPT2 NAFR7 NAFR6 NAFR5 NAFR4 NAFR3 NAFR2 NAFR1 NAFR0 0xFF
0x4805h
Misc. option
OPT3 Reserved
HSI
TRIM
LSI _ EN
IWDG
_HW
WWDG
_HW
WWDG
_HALT
0x00
0x4806 NOPT3 Reserved
NHSI
TRIM
NLSI
_ EN
NIWDG
_HW
NWWDG
_HW
NWWG
_HALT
0xFF
0x4807
Clock option
OPT4 Reserved EXT CLK
CKAWU
SEL
PRS C1 PRS C0 0x00
0x4808 NOPT4 Reserved
NEXT
CLK
NCKA
WUSEL
NPRSC1 NPR SC0 0xFF
0x4809
HSE clock
startup
OPT5 HSECNT [7:0] 0x00
0x480A NOPT5 NHSECNT [7:0] 0xFF
0x480B
Reserved
OPT6 Reserved 0x00
0x480C NOPT6 Reserved 0xFF
0x480D
Reserved
OPT7 Reserved 0x00
0x480E NOPT7 Reserved 0xFF
0x480F
Reserved
- Reserved -
0x48FD - Reserved -