Datasheet

DocID14771 Rev 15 37/121
STM8S105x4/6 Memory and register map
50
0x00 5250
TIM1
TIM1_CR1 TIM1 control register 1 0x00
0x00 5251 TIM1_CR2 TIM1 control register 2 0x00
0x00 5252 TIM1_SMCR
TIM1 slave mode control
register
0x00
0x00 5253 TIM1_ETR TIM1 external trigger register 0x00
0x00 5254 TIM1_IER TIM1 interrupt enable register 0x00
0x00 5255 TIM1_SR1 TIM1 status register 1 0x00
0x00 5256 TIM1_SR2 TIM1 status register 2 0x00
0x00 5257 TIM1_EGR
TIM1 event generation
register
0x00
0x00 5258 TIM1_CCMR1
TIM1 capture/compare mode
register 1
0x00
0x00 5259 TIM1_CCMR2
TIM1 capture/compare mode
register 2
0x00
0x00 525A TIM1_CCMR3
TIM1 capture/compare mode
register 3
0x00
0x00 525B TIM1_CCMR4
TIM1 capture/compare mode
register 4
0x00
0x00 525C TIM1_CCER1
TIM1 capture/compare enable
register 1
0x00
0x00 525D TIM1_CCER2
TIM1 capture/compare enable
register 2
0x00
0x00 525E TIM1_CNTRH TIM1 counter high 0x00
0x00 525F TIM1_CNTRL TIM1 counter low 0x00
0x00 5260 TIM1_PSCRH TIM1 prescaler register high 0x00
0x00 5261 TIM1_PSCRL TIM1 prescaler register low 0x00
0x00 5262 TIM1_ARRH TIM1 auto-reload register high 0xFF
0x00 5263 TIM1_ARRL TIM1 auto-reload register low 0xFF
0x00 5264 TIM1_RCR
TIM1 repetition counter
register
0x00
0x00 5265 TIM1_CCR1H
TIM1 capture/compare
register 1 high
0x00
0x00 5266 TIM1_CCR1L
TIM1 capture/compare
register 1 low
0x00
0x00 5267 TIM1_CCR2H
TIM1 capture/compare
register 2 high
0x00
0x00 5268 TIM1_CCR2L
TIM1 capture/compare
register 2 low
0x00
0x00 5269 TIM1_CCR3H
TIM1 capture/compare
register 3 high
0x00
Table 8. General hardware register map (continued)
Address Block Register label Register name Reset status