Datasheet

Memory and register map STM8S105x4/6
36/121 DocID14771 Rev 15
0x00 5208 to 0x00 520F Reserved area (8 byte)
0x00 5210
I2C
I2C_CR1 I2C control register 1 0x00
0x00 5211 I2C_CR2 I2C control register 2 0x00
0x00 5212 I2C_FREQR I2C frequency register 0x00
0x00 5213 I2C_OARL I2C Own address register low 0x00
0x00 5214 I2C_OARH
I2C Own address register
high
0x00
0x00 5215 Reserved
0x00 5216 I2C_DR I2C data register 0x00
0x00 5217 I2C_SR1 I2C status register 1 0x00
0x00 5218 I2C_SR2 I2C status register 2 0x00
0x00 5219 I2C_SR3 I2C status register 3 0x0X
0x00 521A I2C_ITR I2C interrupt control register 0x00
0x00 521B I2C_CCRL I2C Clock control register low 0x00
0x00 521C I2C_CCRH I2C Clock control register high 0x00
0x00 521D I2C_TRISER I2C TRISE register 0x02
0x00 521E I2C_PECR
I2C packet error checking
register
0x00
0x00 521F to 0x00 522F Reserved area (17 byte)
0x00 5230 to 0x00 523F Reserved area (6 byte)
0x00 5240
UART2
UART2_SR UART2 status register 0xC0
0x00 5241 UART2_DR UART2 data register 0xXX
0x00 5242 UART2_BRR1 UART2 baud rate register 1 0x00
0x00 5243 UART2_BRR2 UART2 baud rate register 2 0x00
0x00 5244 UART2_CR1 UART2 control register 1 0x00
0x00 5245 UART2_CR2 UART2 control register 2 0x00
0x00 5246 UART2_CR3 UART2 control register 3 0x00
0x00 5247 UART2_CR4 UART2 control register 4 0x00
0x00 5248 UART2_CR5 UART2 control register 5 0x00
0x00 5249 UART2_CR6 UART2 control register 6 0x00
0x00 524A UART2_GTR UART2 guard time register 0x00
0x00 524B UART2_PSCR UART2 prescaler register 0x00
0x00 524C to 0x00 524F Reserved area (4 byte)
Table 8. General hardware register map (continued)
Address Block Register label Register name Reset status