Datasheet

DocID14771 Rev 15 111/121
STM8S105x4/6 Ordering information
115
OPT3 watchdog
OPT4 watchdog
AFR4
(check only one option)
[ ] 0: Remapping option inactive. Default alternate functions
used. Refer to pinout description
[ ] 1: Port D7 alternate function = TIM1_CH4
AFR5
(check only one option)
[ ] 0: Remapping option inactive. Default alternate functions
used. Refer to pinout description
[ ] 1: Port B3 alternate function = TIM1_ETR, port B2 alternate
function = TIM1_NCC3, port B1 alternate function =
TIM1_CH2N, port B0 alternate function = TIM1_CH1N.
AFR6
(check only one option)
[ ] 0: Remapping option inactive. Default alternate functions
used. Refer to pinout description
[ ] 1: Port B5 alternate function = I2C_SDA, port B4 alternate
function = I2C_SCL
AFR6
(check only one option)
[ ] 0: Remapping option inactive. Default alternate functions
used. Refer to pinout description
[ ] 1: Port D4 alternate function = BEEP.
WWDG_HALT
(check only one option)
[ ] 0: No reset generated on halt if WWDG active[
[ ] 1: Reset generated on halt if WWDG active
WWDG_HW
(check only one option)
[ ] 0: WWDG activated by software
[ ] 1: WWDG activated by hardware
IWDG_HW
(check only one option)
[ ] 0: IWDG activated by software
[ ] 1: IWDG activated by hardware
LSI_EN
(check only one option)
[ ] 0: LSI clock is not available as CPU clock source
[ ] 1: LSI clock is available as CPU clock source
HSITRIM
(check only one option)
[ ] 0: 3-bit trimming supported in CLK_HSITRIMR register
[ ] 1: 4-bit trimming supported in CLK_HSITRIMR register
PRSC
(check only one option)
[ ] for 16 MHz to 128 kHz prescaler
[ ] for 8 MHz to 128 kHz prescaler
[ ] for 4 MHz to 128 kHz prescaler
CKAWUSEL
(check only one option)
[ ] LSI clock source selected for AWU
[ ] HSE clock with prescaler selected as clock source for AWU
EXTCLK
(check only one option)
[ ] External crystal connected to OSCIN/OSCOUT
[ ] External signal on OSCIN