Datasheet
STM8S105xx
Description
2 Description
The STM8S105xx access line 8-bit microcontrollers offer from 16 to 32 Kbytes Flash
program memory, plus integrated true data EEPROM. They are referred to as medium-
density devices in the STM8S microcontroller family reference manual (RM0016).
All devices of the STM8S105xx access line provide the following benefits: reduced system
cost, performance and robustness, short development cycles, and product longevity.
The system cost is reduced thanks to an integrated true data EEPROM for up to 300k
write/erase cycles and a high system integration level with internal clock oscillators,
watchdog, and brown-out reset.
Device performance is ensured by a 16 MHz CPU clock frequency and enhanced
characteristics which include robust I/O, independent watchdogs (with a separate clock
source), and a clock security system.
Short development cycles are guaranteed due to application scalability across common
family product architecture with compatible pinout, memory map and modular peripherals.
Full documentation is offered with a wide choice of development tools.
Product longevity is ensured in the STM8S family thanks to their advanced core which is
made in a state-of-the art technology for applications with 2.95 V to 5.5 V operating supply.
Table 2: STM8S105xx access line features
Device
STM8S105C6
STM8S105C4
STM8S105S6
STM8S105S4
STM8S105K6
STM8S105K4
Pin count
48
48
44
44
32
32
Maximum
number of GPIOs
38
38
34
34
25
25
Ext. Interrupt pins
35
35
31
31
23
23
Timer CAPCOM
channels
9
9
8
8
8
8
Timer
complementary
outputs
3
3
3
3
3
3
A/D Converter
channels
10
10
9
9
7
7
High sink I/Os
16
16
15
15
12
12
Medium density
Flash Program
memory (bytes)
32K
16K
32K
16K
32K
16K
Data EEPROM
(bytes)
1024
1024
1024
1024
1024
1024
RAM (bytes)
2K
2K
2K
2K
2K
2K
Peripheral set
Advanced control timer (TIM1), General-purpose timers (TIM2 and TIM3), Basic timer (TIM4) SPI, I
2
C,
UART, Window WDG, Independent WDG, ADC
DocID14771 Rev 13 9/99