Datasheet

STM8S105xx
Electrical characteristics
Symbol Parameter Conditions Min Typ Max Unit
(1)
V
AIN
Conversion voltage range
(2)
VSSA VDDA
V
Devices with external
V
REF+
/V
REF-
pins
V
REF-
V
REF+
V
C
ADC
Internal sample and hold
capacitor
3.0 pF
t
S
(2)
Sampling time f
ADC
= 4 MHz 0.75 µs
f
ADC
= 6 MHz 0.5
t
STAB
Wakeup time from standby 7.0 µs
t
CONV
Total conversion time (including
sampling time, 10-bit resolution)
f
ADC
= 4 MHz 3.5 µs
f
ADC
= 6 MHz 2.33 µs
14 1/f
ADC
Notes:
(1)
Data guaranteed by design, not tested in production..
(2)
During the sample time the input capacitance C
AIN
(3 pF max) can be charged/discharged by the external
source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level
within t
S.
After the end of the sample time t
S
, changes of the analog input voltage have no effect on the conversion
result. Values for the sample clock t
S
depend on programming.
Table 46: ADC accuracy with RAIN < 10 kΩ , VDDA= 5 V
Symbol Parameter Conditions Typ Max
(1)
Unit
|E
T
| Total unadjusted error
(2)
f
ADC
= 2 MHz 1.0 2.5 LSB
f
ADC
= 4 MHz 1.4 3.0
f
ADC
= 6 MHz 1.6 3.5
|E
O
| Offset error
(2)
f
ADC
= 2 MHz 0.6 2.0
f
ADC
= 4 MHz 1.1 2.5
f
ADC
= 6 MHz 1.2 2.5
|E
G
| Gain error
(2)
f
ADC
= 2 MHz 0.2 2.0
f
ADC
= 4 MHz 0.6 2.5
f
ADC
= 6 MHz 0.8 2.5
|E
D
| Differential linearity error
(2)
f
ADC
= 2 MHz 0.7 1.5
f
ADC
= 4 MHz 0.7 1.5
f
ADC
= 6 MHz 0.8 1.5
|E
L
| Integral linearity error
(2)
f
ADC
= 2 MHz 0.6 1.5
f
ADC
= 4 MHz 0.6 1.5
f
ADC
= 6 MHz 0.6 1.5
Notes:
(1)
Data based on characterization results, not tested in production.
(2)
ADC accuracy vs. negative injection current: Injecting negative current on any of the analog input pins should
be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input.
DocID14771 Rev 13 75/99