Datasheet

Electrical characteristics
STM8S105xx
Table 28: Total current consumption in halt mode at VDD = 3.3 V
Symbol Parameter Conditions Typ Max at
85 °C
(1)
Max at
125 °C
(1)
Unit
I
DD(H)
Supply current in
halt mode
Flash in operating mode, HSI
clock after wakeup
60 90 150 µA
Flash in powerdown mode,
HSI clock after wakeup
4.5 20 80
Notes:
(1)
Data based on characterization results, not tested in production.
10.3.2.5 Low power mode wakeup times
Table 29: Wakeup times
Symbol
Parameter Conditions Typ Max
(1)
Unit
t
WU(WFI)
Wakeup time
from
wait mode to run
mode
(2)
0 to 16 MHz
See note
(3)
μs
f
CPU
= f
MASTER
= 16 MHz 0.56
t
WU(AH)
Wakeup time
active
halt mode to run
mode
(2)
MVR
voltage
regulator
on
(4)
Flash in
operating
mode
(5)
HSI
(after
wakeup)
1
(6)
2
(6)
Wakeup time
active
halt mode to run
mode
(2)
MVR
voltage
regulator
on
(4)
Flash in
power-down
mode
(5)
HSI
(after
wakeup)
3
(6)
Wakeup time
active
halt mode to run
mode
(2)
MVR
voltage
regulator
off
(4)
Flash in
operating
mode
(5)
HSI
(after
wakeup)
48
(6)
Wakeup time
active
halt mode to run
mode
(2)
MVR
voltage
regulator
off
(4)
Flash in
power-down
mode
(5)
HSI
(after
wakeup)
50
(6)
t
WU(H)
Wakeup time
from
halt mode to run
mode
(2)
Flash in operating mode
(5)
52
Flash in power-down mode
(5)
54
Notes:
(1)
Data guaranteed by design, not tested in production.
(2)
Measured from interrupt event to interrupt vector fetch.
(3)
t
WU(WFI)
= 2 x 1/f
master
+ 67 x 1/f
CPU.
(4)
Configured by the REGAH bit in the CLK_ICKR register.
(5)
Configured by the AHALT bit in the FLASH_CR1 register.
52/99 DocID14771 Rev 13